A CMOS transimpedance amplifier with high gain and wide dynamic range for optical fiber sensing system

Liu, Shubin; Zou, Jiao; Ma, Ning; Zhu, Zhangming; Yang, Yong

doi:10.1016/j.ijleo.2015.04.021

Cited by 18 publications

(7 citation statements)

References 8 publications

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“…Hence, a faster structure with higher data rate and a wider frequency bandwidth can be obtained. Using M15 as a diode-connected load at node out2, provides a trade-off between the gain and the bandwidth [16].…”

Section: The Proposed Tiamentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

“…Another structure, which is widely used in designing TIAs, is the inverter [16]- [20]. In [16], a three-stage cascade push pull conventional inverter is used, beside series inductive peaking technique. Employing series inductive peaking results in an extended bandwidth, while occupies large area on chip.…”

Section: Introductionmentioning

confidence: 99%

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A Multi-Stage TIA based on Cascoded-Inverter Structures for Low-power Applications

Honarmand

Pourahmadi

Shayesteh

et al. 2021

JICS

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This article discusses a multi-stage transimpedance amplifier (TIA), which is based on three stages of a modified inverter structure. The traditional inverter structures’ performances are improved adding two cascoded transistors. This new structure benefits from elimination of the Miller-capacitances in comparison with the traditional inverters, which can provide higher speed and wider frequency bandwidth. Manipulating the trade-offs among bandwidth, gain and power consumption beside using Gm/ID technique, this paper introduces a low-power transimpedance amplifier for high-bit rates in optical communication receiver systems. Moreover, active types of inductors are also used to lesson the occupied area and increase the frequency bandwidth. Transferring poles of the improved circuit to higher frequencies means less required DC current for a fixed bandwidth range, which results in low-power characteristic.

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Section: The Proposed Tiamentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A Multi-Stage TIA based on Cascoded-Inverter Structures for Low-power Applications

Honarmand

Pourahmadi

Shayesteh

et al. 2021

JICS

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show abstract

“…Generally, RGC-TIA is considered for design and analysis of TIA because of its low input impedance. In the case of low supply voltage design, the low input impedance is not achieved because of the low common source local feedback gain (Manasreh, 2017). The conventional design of the TIA for this paper is given in Figure 1.…”

Section: Conventional Transimpedance Amplifiermentioning

confidence: 99%

“…But this circuit also uses the inductor for enhancing the bandwidth and hence leads to larger area and higher power consumption. As most of the TIAs maintain the current mode operation at the cost of destruction in shunt feedback topology or common gate configuration (Singh et al , 2015; Liu et al , 2015; Shahdoost et al , 2016). In Chan and Chen (2014), the authors manage to increase the bandwidth of TIA using multilevel network.…”

Section: Related Workmentioning

confidence: 99%

Forty five nm CMOS low power multilevel active feedback transimpedance amplifier for optical receivers

Singh

Niranjan

Kumar

2021

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Purpose Recent advancements in the domain of smart communication systems and technologies have led to the augmented developments for very large scale integrated circuit designs in electro-magnetic applications. Increasing demands for low power, compact area and superior figure of merit–oriented circuit designs are the trends of the recent research studies. Hence, to accomplish such applications intended for optical communications, the transimpedance amplifier (TIA) was designed. Design/methodology/approach In this research work, the authors present a multi-layer active feedback structure which mainly composes a transimpedance stage and a gain stage followed by a low pass filter. This structure enables to achieve improved input impedance and superior gain. A simplified cascaded amplifier has also been designed in a hierarchical topology to improvise the noise effect further. The proposed TIA has been designed using Taiwan Semiconductor Manufacturing Company 45 nm complementary metal oxide semiconductor technology. Moreover, the thermal noise has been analyzed at −3 dB bandwidth to prove the reduction in thermal noise with increase in frequency for most of the devices used in the designed circuit. Findings The proposed differential TIA circuit was found to obtain the transimpedance gain of 50.1 dBO without applying any external bias current which is almost 8% improvised as compared to the conventional circuit. In addition to this, bandwidth achieved was 2.15 GHz along with only 38 W of power consumption, which is reasonably 100 times improvised in comparison of conventional circuit. Hence, the proposed differential TIA is suitable for the low power optical communications applications intended to work on low supply voltage. Originality/value The designed work is done by authors in university lab premises and is not copied from anywhere. To the best of the authors’ knowledge, it is 100% original.

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An improved low‐input resistance folded‐cascode transimpedance amplifier for giga‐bit per second optical communication front‐ends

Zohoori,

Hosseini,

Dehkordi

et al. 2023

Circuit Theory & Apps

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SummaryThe present study is devoted to articulating a modified folded‐cascode circuit, to make folded‐cascode structures an attractive configuration as a transimpedance amplifier (TIA) for being employed in Giga‐bit per second optical communication receiver systems. Giga‐bps communication receivers are highly necessitating circuits to isolate the input parasitic capacitance of the photodiode. The present modification makes folded cascodes comparable to the famous regulated cascode (RGC) structures by isolating this parasitic capacitor almost by the same quantity. The system is shown to be capable of operating at 2.5 Gbps up to 8 Gbps data rate with a fixed bandwidth. The paper analyzes and evaluates the designed circuit mathematically, and the obtained simulated results from Cadence using TSMC 65 nm CMOS validate the suitability of the modified circuit as a TIA.

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A CMOS transimpedance amplifier with high gain and wide dynamic range for optical fiber sensing system

Cited by 18 publications

References 8 publications

A Multi-Stage TIA based on Cascoded-Inverter Structures for Low-power Applications

A Multi-Stage TIA based on Cascoded-Inverter Structures for Low-power Applications

Forty five nm CMOS low power multilevel active feedback transimpedance amplifier for optical receivers

An improved low‐input resistance folded‐cascode transimpedance amplifier for giga‐bit per second optical communication front‐ends

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