Deep sub-micron scaled CMOS offers relatively low RF performance at mm-wave frequencies compared with III-V technologies and the high levels of process variation further exacerbate design margins and lesser performance. Instead of optimizing mm-wave circuits for performance at design time, we instead adopt a "maximum tune-ability" approach in which the mm-wave front-end circuitry is made highly tunable and optimized at run-time by digital control and optimization algorithms to overcome process variation effects.