The platform will undergo maintenance on Sep 14 at about 7:45 AM EST and will be unavailable for approximately 2 hours.
2019
DOI: 10.1145/3343030
|View full text |Cite
|
Sign up to set email alerts
|

A Closed-Loop Controller to Ensure Performance and Temperature Constraints for Dynamic Applications

Abstract: To secure correct system operation, a plethora of Reliability, Availability and Serviceability (RAS) techniques have been deployed by circuit designers. RAS mechanisms however, come with the cost of extra clock cycles. In addition, a wide variety of dynamic workloads and different input conditions often constitute preemptive dependability techniques hard to implement. To this end, we focus on a realistic case study of a closed-loop controller that mitigates performance variation with a reactive response. This … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2022
2022
2024
2024

Publication Types

Select...
3
2

Relationship

0
5

Authors

Journals

citations
Cited by 5 publications
(1 citation statement)
references
References 32 publications
0
1
0
Order By: Relevance
“…This requires a control process overhead which is apt to diminish or cancel the efficiency gains of potentially very high processing speeds. New methods are being proposed for ultra-scaled digital microchips (Noltsis, Zambelis, Catthoor, & Soudris, 2019) to remove that overhead and make fuller use of the fast processing available at the physical level while retaining timing guarantees. The timing challenges that are connected with deeply scaled digital microchips have some surprising connections with challenges in non-digital computing.…”
Section: Introductionmentioning
confidence: 99%
“…This requires a control process overhead which is apt to diminish or cancel the efficiency gains of potentially very high processing speeds. New methods are being proposed for ultra-scaled digital microchips (Noltsis, Zambelis, Catthoor, & Soudris, 2019) to remove that overhead and make fuller use of the fast processing available at the physical level while retaining timing guarantees. The timing challenges that are connected with deeply scaled digital microchips have some surprising connections with challenges in non-digital computing.…”
Section: Introductionmentioning
confidence: 99%