17th IEEE International Conference on Micro Electro Mechanical Systems. Maastricht MEMS 2004 Technical Digest
DOI: 10.1109/mems.2004.1290685
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A clean wafer-scale chip-release process without dicing based on vapor phase etching

Abstract: A new method to release MEMS chips from a wafer without dicing is presented. It can be applied whenever SO1 wafers are used that are structured from both the device and the handle side using DRIE. This method enables the release of extremely fragile structures without any mechanical impact on the chips. No more dicing residues or debris are created and deposited onto the wafer. The basic idea consists of etching deep surrounding trenches on the device and the handle layer that are displaced by about 20 pm and … Show more

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Cited by 37 publications
(28 citation statements)
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“…The 10-µm-thick device layer of an SOI wafer is structured into the mirrors and the frame by deep reactive-ion etching (DRIE). At the same time, the trenches for the dice free release [8] have been defined. During the next step, 2.2 µm thermal wet silicon dioxide is grown in order to fill the trenches between the mirrors and the frame.…”
Section: Fabricationmentioning
confidence: 99%
See 1 more Smart Citation
“…The 10-µm-thick device layer of an SOI wafer is structured into the mirrors and the frame by deep reactive-ion etching (DRIE). At the same time, the trenches for the dice free release [8] have been defined. During the next step, 2.2 µm thermal wet silicon dioxide is grown in order to fill the trenches between the mirrors and the frame.…”
Section: Fabricationmentioning
confidence: 99%
“…In a final DRIE step, the backside openings of the mirror and the dice free chip release trenches are etched into the 350-µm handle layer. First, the mirrors and then, the whole chips are released in a dry hydroflouro (HF) vapor etch step [8]. The mirror chips are now ready to be assembled with the electrode chip.…”
Section: Fabricationmentioning
confidence: 99%
“…First the mirrors and then the whole chips are released in a dry HF vapor etch step. 6 The mirror chips are now ready for assembly with the electrode chip. Figure 6 shows micrographs of released single mirrors with torsion and flexion suspension.…”
Section: Realizationmentioning
confidence: 99%
“…The device is micro-fabricated on SOI wafers by double-side etching with Deep Reactive Ion Etching (DRIE). The release and singulation of the device is made by vapor phase hydrofluoric acid etching (HF VPE) [3].…”
Section: Introductionmentioning
confidence: 99%