A chip set for lossless image compression

Shah, Imran; Akiwumi-Assani, O.; Johnson, B. Connor

doi:10.1109/4.75001

Cited by 14 publications

(7 citation statements)

References 9 publications

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“…If n = 1; then by the arithmetic expansion [2], h 0 may be written as h 0 = 1 + ( 2 0 1)j0 + 1(3 0 1)k0 + (1 0 13 0 2 0 23)j0k0. (13) h(j; k) = w(j; k) = (01) j k (25) where w(j; k) defines the element of the Walsh-Hadamard transform, W n at row j and column k; respectively.…”

Section: Basic Definitions and Properties Of Uchtsmentioning

confidence: 99%

“…The existence of constant-geometry fast butterflies is suitable for efficient very large-scale integration (VLSI) implementation. The introduced UCHT's may be used for various applications, where the Walsh-Hadamard transform has already been used [1], [2], [4]- [7], [11], [12], [17], [25], [26], [28], [31]- [39]. Generally, the UCHT's may be classified as the integer-valued and complex integervalued transforms.…”

Section: Introductionmentioning

confidence: 99%

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Family of unified complex Hadamard transforms

Rahardja¹,

Falkowski²

1999

IEEE Trans. Circuits Syst. II

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Novel discrete orthogonal transforms are introduced in this paper, namely the unified complex Hadamard transforms. These transforms have elements confined to four elementary complex integer numbers which are generated based on the Walsh-Hadamard transform, using a single unifying mathematical formula. The generation of higher dimension transformation matrices are discussed in detail.Index Terms-Digital signal processing, discrete transforms, fast algorithms, orthogonal transforms, unified complex Hadamard transforms.

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Section: Basic Definitions and Properties Of Uchtsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Family of unified complex Hadamard transforms

Rahardja¹,

Falkowski²

1999

IEEE Trans. Circuits Syst. II

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“…The LZ chip is compatible with UNIX compress [2]. In a recent article "Chip Set for Lossless Image Compression", Shah states the "S transform generally reduced the entropy only about as effectively as first order DPCM [3]."…”

Section: Compression Performancementioning

confidence: 99%

Chip set for high performance lossless image compression and entropy coding

Venbrux¹,

Liu

1992

[Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing

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A B S T R A C TThis paper describes the first Rice Algorithm chip set. It operates under laboratory conditions at 25 Msamples/sec independent of entropy or quantization (4..14 bits/pixel). The algorithm is lossless and adapts to changing entropy conditions making it suited for images. The algorithm requires no external RAM and compression performance exceeds that of DPCM with UNIX compress. The encoder can operate a t twice the decoding rate. In the laboratory, most encoder parts were fully functional a t 60 Msamples/sec; or 840 Mbits/sec at N=14. The chips have been fabricated in a 1.0 micron CMOS process and are 5mm on a side. I N T R O D U C T I O NThe chip set discussed in this paper' describes the first Rice Algorithm [I] chip set and is designed to perform high speed adaptive lossless compression and decompression. The Rice Algorithm was developed back in the early 1970s at Jet Propulsion Laboratory for use in deep space missions. Even though this algorithm may have appeared to lay dormant to those outside JPL, this chip set attains better compression performance on most images than using UNIX compress with DPCM.The major objective for designing and fabricating the chip set is to provide real time compression for satellites. In order to compress satellite imagery it must adapt rapidly to changing scene statistics and compress image data over a wide entropy range. Under nominal conditions (25C, 5.0V, nominal process) the encoder has been tested to be fully functional above 50 Msamples/sec and the decoder at 25 Msamples/sec. The chip set allows quantization from 4 bits through 14 bits/sample. At mazimum quantization, the encoder can compress data at a continuous rate of over 700 Mbits/second. The chip set also can be operated as a high speed entropy coder/decoder by bypassing the This research was supported in part by NASA under grant NAGW-1406.DPCM part of the chips. Entropy coders are sometimes used in lossy schemes for coding addresses and magnitudes of frequency bins. Both chips have been fabricated in a 1.0 micron CMOS process. R I C E A L G O R I T H M OVERVIEWThe Rice Algorithm is a lossless compression method that is efficient over a wide range of entropy conditions. The algorithm handles Merent entropy conditions by having multiple coders, each of which is tuned to compress data at a particular entropy range.Instead of guessing what lies ahead on the scanline or on adjacent lines, as do many compression techniques, this algorithm codes a block of pixels by each of the coders and then selects the output from the coder that does the best compression job.Compression is done on small blocks of pixels (16, for example). This allows excellent adaptation within a scanline. Using smaller blocks does increase the overhead due to the ID bits (identification bits) preceding each data block. The ID bits inform the decoder which of the coders won for that block.A block diagram of the Rice Algorithm is shown in Figure 1. In typical operation, the first encoding step is to save a reference pixel at the start of eve...

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“…The Q output of FF1 is the sign bit and will constitute the least significant bit of the conversion b s . If v e > V ref 2 , b s is set to "1", otherwise it is set to "0". Notice that this bit reflects the polarity of v e and also assigns even values to inputs with negative v e and odd values to inputs with positive v e (this is consistent with the notation used in Fig.…”

Section: A/d Architecturementioning

confidence: 99%

“…The output of the source is a set of symbols with a given probability of occurrence. Hardware implementations of popular compression algorithms such as the Huffman coding [1], Lempel-Ziv coding [2], binary arithmetic coding [3], and the Rice algorithm [4] have been reported in the literature. These complex hardware implementations typically preclude the direct integration of an A/D and a compression algorithm at the sensor level.…”

Section: Introductionmentioning

confidence: 99%

An Analog-to-Digital Converter with Golomb-Rice Output Codes

Leon

Balkir

Sayood

et al.

2005 IEEE International Symposium on Circuits and Systems

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An analog-to-digital converter with data compression capabilities is described. By sharing circuits between an integrating converter and a Golomb-Rice encoder it is possible to jointly perform the tasks of quantization and coding. The Golomb-Rice codes are generated during the conversion cycle by employing a shift register and a digital multiplexer. The final codeword is read out serially from the shift register. The converter can also work in a non-compressing mode. This design provides a compact circuit suitable for on-sensor compression. Simulations at the system and transistor level corroborate the validity of the design.

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A chip set for lossless image compression

Cited by 14 publications

References 9 publications

Family of unified complex Hadamard transforms

Family of unified complex Hadamard transforms

Chip set for high performance lossless image compression and entropy coding

An Analog-to-Digital Converter with Golomb-Rice Output Codes

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