A Charge-Plasma-Based Dielectric-Modulated Junctionless TFET for Biosensor Label-Free Detection

Singh, Deepika; Pandey, S. K.; Nigam, Kaushal; Sharma, Dheeraj; Yadav, Dharmendra Singh; Kondekar, P. N.

doi:10.1109/ted.2016.2622403

Cited by 185 publications

(70 citation statements)

References 21 publications

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“…Therefore, the source doping concentration was selected as 5 × 10 17 cm −3 in order to obtain maximal Ion/Ioff value. 60 mV/Dec -1.0x10 -4 0.0 1.0x10 -4 2.0x10 -4 3.0x10 -4 4.0x10 -4 5.0x10 -4 6.0x10 -4 7.0x10 -4 8.0x10 -4 Drain Current (A/μm) 0.0 2.0x10 18 4.0x10 18 6.0x10 18 8.0x10 18 1.0x10 19 3.6x10 -4 3.9x10 -4 4.2x10 -4 4.5x10 -4 4.8x10 -4 5.1x10 -4 5.4x10 -4 5.7x10 -4 6.0x10 -4 Vds = 1V,Vgs = 1.2V 4.0x10 -18 6.0x10 -18 8.0x10 -18 1.0x10 -17 1.2x10 -17 1.4x10 -17 1.6x10 -17 1.8x10 -17 2.0x10 We mentioned above that the gate electrode was divided into three parts namely auxiliary gate (M1), control gate (M2) and tunnel gate (M3) with workfunctions ΦM1, ΦM2 and ΦM3, respectively, where ΦM1 = ΦM3 < ΦM2. Next, the effects of the three parameters on the transfer characteristics will be discussed.…”

Section: Effect Of Device Parameters On the Transfer Characteristicsmentioning

confidence: 99%

“…As a whole, TFETs reported in recent years adopt abrupt junction at tunneling interface, which leads to a complex fabrication processes and a high thermal budget. In addition, a heavily doped concentration in the channel and active region are also challenging during the fabrication process and it is easy to be influenced by random dopant fluctuations (RDFs) [17][18][19][20][21].…”

Section: Introductionmentioning

confidence: 99%

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Design and Investigation of a Dual Material Gate Arsenic Alloy Heterostructure Junctionless TFET with a Lightly Doped Source

et al. 2019

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This paper designs and investigates a novel structure of dual material gate-engineered heterostructure junctionless tunnel field-effect transistor (DMGE-HJLTFET) with a lightly doped source. Similar to the conventional HJLTFET, the proposed structure still adopts an InAs/GaAs0.1Sb0.9 heterojunction at source and channel interface and employs a polarization electric field at the arsenic heterojunction induced by the lattice mismatch in the InAs and GaAs0.1Sb0.9 zinc blende crystal to improve band to band tunneling (BTBT) current. However, the gate electrode is divided into three parts in DMGE-HJLTFET namely the auxiliary gate (M1), control gate (M2) and tunnel gate (M3) with workfunctions ΦM1, ΦM2 and ΦM3, where ΦM1 = ΦM3 < ΦM2, which not only improves ON-state current but also decreases the OFF-state current. In addition, a lightly doped source is used to further decrease the OFF-state current of this device. Simulation results indicate that DMGE-HJLTFET provides superior metrics in terms of logic and analog/radio frequency (RF) performance as compared with conventional HJLTFET, the maximum ON-state current and transconductance of the DMGE-HJLTFET increases up to 5.46 × 10−4 A/μm and 1.51 × 10−3 S/μm at 1.0 V drain-to-source voltage (Vds). Moreover, average subthreshold swing (SSave) of DMGE-HJLTFET is as low as 15.4 mV/Dec at low drain voltages. Also, DMGE-HJLTFET could achieve a maximum cut-off frequency (fT) of 423 GHz at 0.92 V gate-to-source voltage (Vgs) and a maximum gain bandwidth (GBW) of 82 GHz at Vgs = 0.88 V, respectively. Therefore, it has great potential in future ultra-low power integrated circuit applications.

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Section: Effect Of Device Parameters On the Transfer Characteristicsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Design and Investigation of a Dual Material Gate Arsenic Alloy Heterostructure Junctionless TFET with a Lightly Doped Source

et al. 2019

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“…The cutoff frequency (f T ) and GBW product are important indicators for evaluating the frequency characteristics of DLTFETs and H-DLTFETs [32]. In Equation (2), the f T can be expressed by a ratio of g m to C gg [33,34].…”

Section: Frequency Characteristicmentioning

confidence: 99%

A Doping-Less Tunnel Field-Effect Transistor with Si0.6Ge0.4 Heterojunction for the Improvement of the On–Off Current Ratio and Analog/RF Performance

et al. 2019

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In this paper, a novel doping-less tunneling field-effect transistor with Si0.6Ge0.4 heterojunction (H-DLTFET) is proposed using TCAD simulation. Unlike conventional doping-less tunneling field-effect transistors (DLTFETs), in H-DLTFETs, germanium and Si0.6Ge0.4 are used as source and channel materials, respectively, to provide higher carrier mobility and smaller tunneling barrier width. The energy band and charge carrier tunneling efficiency of the tunneling junction become steeper and higher as a result of the Si0.6Ge0.4 heterojunction. In addition, the effects of the source work function, gate oxide dielectric thickness, and germanium content on the performance of the H-DLTFET are analyzed systematically, and the below optimal device parameters are obtained. The simulation results show that the performance parameters of the H-DLTFET, such as the on-state current, on/off current ratio, output current, subthreshold swing, total gate capacitance, cutoff frequency, and gain bandwidth (GBW) product when Vd = 1 V and Vg = 2 V, are better than those of conventional silicon-based DLTFETs. Therefore, the H-DLTFET has better potential for use in ultra-low power devices.

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“…To address these issues, a lot of novel structures of TFETs are proposed [8][9][10][11][12][13][14][15][16][17][18][19]. As a whole, most of TFETs reported in recent years adopt different doping concentration in channel and active regions to form heavily doped abrupt junction at tunneling interface, which leads to a complex fabrication processes and a high thermal budget, what's more, introduction of high-density layer at source/channel junction and Gaussian doping in drain region also find difficultly during fabrication process and it's easy to be influenced by random dopant fluctuations (RDFs) [20][21][22][23].…”

Section: Introductionmentioning

confidence: 99%

Improvement of Electrical Performance in Heterostructure Junctionless TFET Based on Dual Material Gate

et al. 2019

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In this paper, a dual metallic material gate heterostructure junctionless tunnel field-effect transistor (DMMG-HJLTFET) is proposed and investigated. We use the Si/SiGe heterostructure at the source/channel interface to improve the band to band tunneling (BTBT) rate, and introduce a sandwich stack (GaAs/Si/GaAs) at the drain region to suppress the OFF-state current and ambiplolar current. Simultaneously, to further decrease ambipolar current, the gate electrode is divided into three parts namely auxiliary gate (M1), control gate (M2), and tunnel gate (M3) with workfunctions Φ M1 , Φ M2 and Φ M3 , respectively, where Φ M1 = Φ M3 < Φ M2 . Simulation results indicate that DMMG-HJLTFET provides superior performance in terms of logic and analog/RF as compared with other possible combinations, the ON-state current of the DMMG-HJLTFET increases up to 9.04 × 10 −6 A/µm, and the maximum g m (which determine the analog performance of devices) of DMMG-HJLTFET is 1.11 × 10 −5 S/µm at 1.0V drain-to-source voltage (Vds). Meanwhile, RF performance of devices depends on the cut-off frequency (f T ) and gain bandwidth (GBW), and DMMG-HJLTFET could achieve a maximum f T of 5.84 GHz, and a maximum GBW of 0.39 GHz, respectively.

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A Charge-Plasma-Based Dielectric-Modulated Junctionless TFET for Biosensor Label-Free Detection

Cited by 185 publications

References 21 publications

Design and Investigation of a Dual Material Gate Arsenic Alloy Heterostructure Junctionless TFET with a Lightly Doped Source

Design and Investigation of a Dual Material Gate Arsenic Alloy Heterostructure Junctionless TFET with a Lightly Doped Source

A Doping-Less Tunnel Field-Effect Transistor with Si0.6Ge0.4 Heterojunction for the Improvement of the On–Off Current Ratio and Analog/RF Performance

Improvement of Electrical Performance in Heterostructure Junctionless TFET Based on Dual Material Gate

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