A calibration-free 96.6-dB-SNDR non-bootstrapped 1.8-V 7.9-mW delta-sigma modulator with class-AB single-stage switched VMAs

Sutula, Stepan; Dei, Michele; Terés, Lluís; Serra-Graells, F.

doi:10.1109/iscas.2016.7527170

Cited by 1 publication

(1 citation statement)

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“…This performance is mainly achieved by the introduction of Class-AB single-stage variable-mirror amplifiers (VMAs), first proposed by these authors in [ 11 ], combined with a power-aware modulator discrete-time (DT) architecture and a five-phase SC scheme. This work was introduced in [ 12 ], but extensive new material is included here concerning ΔΣM architecture selection and performance, circuit-block specifications, switched-VMA operation, ΔΣM robustness against technology mismatch, process and temperature variations and expanded state-of-the-art comparison.…”

Section: Introductionmentioning

confidence: 99%

A Robust 96.6-dB-SNDR 50-kHz-Bandwidth Switched-Capacitor Delta-Sigma Modulator for IR Imagers in Space Instrumentation

Dei

Sutula

Cisneros

et al. 2017

Sensors

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Infrared imaging technology, used both to study deep-space bodies’ radiation and environmental changes on Earth, experienced constant improvements in the last few years, pushing data converter designers to face new challenges in terms of speed, power consumption and robustness against extremely harsh operating conditions. This paper presents a 96.6-dB-SNDR (Signal-to-Noise-plus-Distortion Ratio) 50-kHz-bandwidth fourth-order single-bit switched-capacitor delta-sigma modulator for ADC operating at 1.8 V and consuming 7.9 mW fit for space instrumentation. The circuit features novel Class-AB single-stage switched variable-mirror amplifiers (SVMAs) enabling low-power operation, as well as low sensitivity to both process and temperature deviations for the whole modulator. The physical implementation resulted in a 1.8-mm2 chip integrated in a standard 0.18-μm 1-poly-6-metal (1P6M) CMOS technology, and it reaches a 164.6-dB Schreier figure of merit from experimental SNDR measurements without making use of any clock bootstrapping, analog calibration, nor digital compensation technique. When coupled to a 2048×2048 IR imager, the current design allows more than 50 frames per minute with a resolution of 16 effective number of bits (ENOB) while consuming less than 300 mW.

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Section: Introductionmentioning

confidence: 99%