A block-and-actions generator as an alternative to a simulator for collecting architecture measurements

Abstract

Abstrac tTo design a new processor or to modify an existing one , designers need to gather data to estimate the influence o f specific architecture features on the performance of the proposed machine (PM) . To obtain this data, it i s necessary to measure on an existing machine (EM) the dynamic behavior of typical programs . Traditionally , simulators have been used to obtain measurements fo r PMs . Since several hundred EM instructions are required to decode, interpret, and measure each simulated (PM) instruction, the simulation time of typical programs is prohibitively large . Thus, designers tend to simulate only small programs and the results obtaine d might not be representative of a real system behavior . I n this paper we present an alternative tool for collectin g architecture measurements : the Block-and-Actions Generator (BKGEN) . BKGEN produces a version of th e program being measured which is directly executable by the EM . This executable version is obtained directl y with the EM compiler or with the PM compiler and a assembly-to-assembly translator . The choice between these alternatives depends on the EM and PM compile r technology and the type of measurements to be obtained . BKGEN also collects the PM events to be measure d (called actions) . Each EM block of instructions is associated with a PM block of actions so that when the program is executed, it collects the measurements associated with the PM . The main advantage of BKGEN is tha t the execution time is substantially reduced compared t o the execution time of a simulator while collecting similar data . Thus, large typical programs (compilers, assemblers, word processors, . . .) can be used by th e designer to obtain meaningful measurements .Permission to copy without fee all or part of this material is granted provide d that the copies are not made or distributed for direct commercial advantage , the ACM copyright notice and the title of the publication and its date appear , and notice is given that copying is by permission of the Association fo r Computing \hachiners . To copy otherwise, or to republish, requires a lee and / or specific permission . ©1987 ACM 0-89791-235-7/87/0006/0014 75 . Introductio nTo design a new processor or to modify an existin g one, designers need to estimate the influence of specifi c architecture features on the performance of the processor. To obtain the data needed to perform these estimates, it is necessary to measure the dynamic behavio r of typical programs . These measurements let the designer (1) discover which architecture features ar e critical in the design so that these features can be tuned to improve performance ; (2) compare several implementation alternatives of the same architecture; and (3) compare the performance of different architectures .For a processor that is being designed a model tha t defines the processor characteristics must be used. Traditionally, this model is defined either by a simulator or by an emulator . (For existing processors one can us e software, firmware, or hardware m...

Direct execution models of processor behavior and performance

“…These techniques use a direct assembler-to-assembler translation of target machine code to that on the host (Huguet et al, 1987, May 1987. Although this approach can lead to good performance, direct assembler-to-assembler translation requires detailed analyses of both the host and target architectures, and can be difficult if the machines are very disimilar.…”

“…More importantly, the resulting translator suffers from a lack of portability. Huguet et al (1987) also proposes compiling an application to both target and host machine code, and establishing a correspondence between the basic blocks of the two. This approach relies however on both compilers generating code in which both the same number of basic blocks are created, and the order in which the blocks are executed is the same.…”