A 94.1 dB DR 4.1 nW/Hz Bandwidth/Power Scalable DTDSM for IoT Sensing Applications Based on Swing-Enhanced Floating Inverter Amplifiers

Zhao, Yibo; Zhang, Huajun; Hu, Yaopeng; Bao, Yuanxin; Ye, Le; Qu, Wanyuan; Zhao, Mi; Tan, Zhichao

doi:10.1109/cicc51472.2021.9431415

Cited by 12 publications

(4 citation statements)

References 1 publication

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“…Considering temperature and humidity are both slowly variable physical quantities, moreover, both BJT and polyimide reflect temperature and humidity changes through voltage, a discrete-time Σ∆ ADC based on charge integration principle is more suitable for readout circuit [21,22]. For multi-sensor chips, the types and ranges of analog signals corresponding to different physical quantities may be different, so it is crucial to match these signals reasonably with the dynamic range of ADC, otherwise the accuracy of the sensor will be reduced [23].…”

Section: Introductionmentioning

confidence: 99%

Design of an integrated temperature and humidity sensor based on high dynamic range utilization rate ADC

Liu

et al. 2024

IEICE Electron. Express

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An integrated sensor for temperature (Temp) and humidity (RH) measurement is designed. The temperature and humidity (T/H) sensing probe are combined with one first-order discrete-time Σ-∆ analog-to-digital converter (ADC). Also, a new ample architecture of ADC is proposed, ADC selects a reasonable reference voltage according to varied range of T/H signals. Therefore, the dynamic range utilization rate of ADC is improved. The proposed sensor is designed and fabricated in 0.153μm CMOS technology. The experimental results show that the T/H sensor achieves a −0.9~0.6% RH measurement accuracy in the humidity range of 10~90% RH, and ±0.4℃ temperature measurement accuracy in the temperature range of −40~120℃.

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Section: Introductionmentioning

confidence: 99%

Design of an integrated temperature and humidity sensor based on high dynamic range utilization rate ADC

Liu

et al. 2024

IEICE Electron. Express

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“…A dynamic bias amplifer which requires a complex common-mode (CM) feedback circuit was proposed in [6], increasing the design complexity and power consumption. A foating-inverter amplifer (FIA) and its application were proposed in [7,8], which represents the highest energy efciency level of the current amplifer design and has relatively good PVT robustness, but its gain was generally limited to about 30 dB. In [9], a cascode FIA was proposed to obtain a moderate gain by sacrifcing a certain swing.…”

Section: Introductionmentioning

confidence: 99%

Analysis and Design of High-Energy-Efficiency Amplifiers for Delta-Sigma Modulators

Lai,

Lin,

Zhao

et al. 2023

Active and Passive Electronic Components

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This study presents a dynamic amplifier with high energy efficiency and high gain suitable for a delta-sigma modulator based on the floating-inverter amplifier (FIA), in-depth analysis of the existing FIA and its improved structure, and simulation verification. Compared with other FIA structures, the proposed amplifier has a better compromise in terms of power consumption and stability, which was designed and simulated using the SMIC 180 nm CMOS technology. Under a 1.2 V power supply, the closed-loop direct current (DC) gain and the output swing were about 104 dB and ±380 mV, respectively, and the input-referred in-band noise was about −100 dB with the chopper circuit.

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“…The FIA offers a stable output commonmode voltage as well as robustness to the input common-mode fluctuation as it works in its isolated power domain powered by a floating reservoir capacitor C RES . These properties are utilized in [10] to realize the scalability of power consumption with the sampling frequency in a DT ADC. However, to further improve the DC gain of the FIA with single-stage configuration, it requires large transistors with a large C RES , which would deteriorate its power and area efficiency.…”

Section: Introductionmentioning

confidence: 99%

Fully Dynamic Discrete-Time ΔΣ ADC Using Closed-Loop Two-Stage Cascoded Floating Inverter Amplifiers

Matsuoka

Nezuka²,

Iizuka

2022

IEEE Trans. Circuits Syst. II

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This brief proposes a fully dynamic discrete-time ADC using closed-loop two-stage cascoded floating inverter amplifiers (FIA). The proposed FIA uses a non-cascoded FIA as the 1 st stage and a cascoded one as the 2 nd . By using this arrangement as well as applying metal-insulator-metal (MIM) capacitors for floating reservoir capacitors, it stably achieves high gain even with the input common-mode voltage fluctuation without an additional CMFB nor calibrations. The proposed ADC fabricated in a 65 nm standard CMOS process realizes a fully dynamic operation without calibration and achieves 88.5 dB SNDR, 97.9 dB SFDR with an OSR of 256. It consumes 43.5 μW from a 1V supply at a 10 MHz sampling frequency.

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A 94.1 dB DR 4.1 nW/Hz Bandwidth/Power Scalable DTDSM for IoT Sensing Applications Based on Swing-Enhanced Floating Inverter Amplifiers

Cited by 12 publications

References 1 publication

Design of an integrated temperature and humidity sensor based on high dynamic range utilization rate ADC

Design of an integrated temperature and humidity sensor based on high dynamic range utilization rate ADC

Analysis and Design of High-Energy-Efficiency Amplifiers for Delta-Sigma Modulators

Fully Dynamic Discrete-Time ΔΣ ADC Using Closed-Loop Two-Stage Cascoded Floating Inverter Amplifiers

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