A 66 $\mu$W 86 ppm$/^{\circ}$C Fully-Integrated 6 MHz Wienbridge Oscillator With a 172 dB Phase Noise FOM

Abstract

This paper presents the design of a new Wienbridge topology. Its phase noise performance, low temperature dependency and low power consumption make it suitable for use in wireless sensor nodes and time-based sensor readout circuitry. The noise as well as temperature behavior of the oscillator is explained using extensive calculations. Measurements on 7 samples of the same batch show a temperature stability of 86 ppm C and a measured spread of 0.9% at an oscillation frequency of 6 MHz. The circuit consumes 66 W and is realized in a 65 nm technology measuring 150 m by 200 m. The measured phase noise figure of merit is 172 dB at a frequency offset of 100 kHz.

A 65-nm CMOS Temperature-Compensated Mobility-Based Frequency Reference for Wireless Sensor Networks

“…The oscillator frequency f osc and the on-chip TS decimated output µ are measured at two different temperatures, T trim,1 and T trim,2 . Those data are used to interpolate the frequency using the interpolant f osc = A · µ B P T AT (6) where µ P T AT is computed from the TS output using (4) that the divider factor N computed for each sample is…”

“…non-linear mapping less than 1% while consuming less than 200 µW [6], [7], but their accuracy relies on the availability of on-chip resistors with low or, at least, accurately defined temperature coefficients.…”

A 3.8 MHz CMOS Wien-bridge oscillator with differential capacitive automatic amplitude control

“…Possible candidates for sub-mW few-MHz on-chip CMOS clock generator include Wien-bridge oscillator [5], relaxation oscillator [6], and ring oscillator [7]. Among the three, Wien-bridge is the only harmonic oscillator that can provide a sinusoidal output while others provide an output with high harmonic contents.…”

“…A previous 6-MHz Wien-bridge oscillator [5] was realized in 65 nm CMOS. But a lower cost CMOS process is desired for the wireless sensor nodes.…”

“…Thus, this work presents a Wien-bridge oscillator in a lower-cost 0.35 µm CMOS technology. Also, this work adopts a capacitive gain control technique rather than a conventional more-nonlinear resistive gain control adopted in [5]. Moreover, this work introduces a differential amplitude control scheme in order to reduce the feedback loop bandwidth dramatically and thus eliminate an otherwise needed off-chip RC filter.…”