A 6‐GHz spread spectrum clock generation with EMI reduction of 30.2 dB for SATA‐III applications

Abstract

In this letter, a 6-GHz spread spectrum clock generation for Serial AT Attachment Generation 3 (SATA-III) applications in 0.18pm CMOS technology is presented. The 3rd-order loop filter is to reduce the ripple of control voltage of VCO and the loop bandwidth is 625 KHz. With the aid of second-order delta-sigma (DR) modulator and triangular profile counter, the division ratio of divider chain can be changed periodically. The modulation frequency is 37.04 KHz with upper bound of 19 for the triangular profile counter. The proposed circuit spreads 30-MHz frequency range from 5.97 to 6.0 GHz with an EMI reduction of 20.3 dB. The dc power consumption is 34 mW with a chip size of 0.54 mm 2 .

Performance evaluation and mathematical analysis of direct sequence and frequency hopping spread spectrum systems under wideband interference

“…This spread spectrum system is now developed for multiple access techniques on fifth generation (5G) cellular telecommunication system [12]. Spread Spectrum systems have been used in many other applications such as digital watermarking for copyright protection of audio, image and video, and multimedia data [13]- [15], digital watermarking for telemedicine [16], DC / DC converter circuit [17], LLC Resonant [18], and 3rd Generation Attachment Series (SATA-III) for reducing electromagnetic interference (EMI) problems [19].…”