A 6.4 GHz Continuous-Time ΣΔ ADC Using Body-Biased Feedforward Op-Amps in 28nm-FDSOI

Abstract

This paper presents a 6.4 GHz 3rd order continuoustime lowpass Sigma-Delta ADC in a 28nm FDSOI process. The ADC achieves 76 dB dynamic range in a 100 MHz bandwidth and consuming only 11.5 mW from a 1 V supply. The loop filter uses a feedforward multistage op-amp which uses body-bias to enhance performance without increasing power consumption. The ADC has a Figure of Merit of 175.4 dB and occupies an area of only 0.0134 mm 2 .