A 50mW HSDPA Baseband Receiver ASIC with Multimode Digital Front-End

Martelli, Chiara; Reutemann, R.; Benkeser, Christian; Huang, Qiuting

doi:10.1109/isscc.2007.373393

Cited by 10 publications

(6 citation statements)

References 3 publications

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“…Of course, the integrated concept anticipates high volumes in manufacturing. [9] Whereas most advanced system concepts -explicitly DSPs -are already based upon 65 nm [10] or at least upon 90 nm technologies [11], higher integrated system-on-chip solutions, even on this year's ISSCC, have been reported using the 130nm technology node [12], [13]. Such complex systems require fully characterized libraries, proven IP blocks and yield optimized wafer processing which are not available in the early phase of a technology cycle.…”

Section: A System-on-chip Solutionsmentioning

confidence: 99%

Technical and economical trends in microelectronics

Ziebart

2007

ESSDERC 2007 - 37th European Solid State Device Research Conference

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-Product innovation has for a long time been directly correlated to scaling as the enabler for increasingly complex products, better performance and large productivity gains. The technical and economical limits of further miniaturization make an end to simple scaling as the primary driver for innovation. Furthermore, customers increasingly demand subsystems or system solutions that include more than one type of circuitry such as digital, RF or analog/mixed signal. This causes a fundamental paradigm shift in the semiconductor industry from technology orientation to application orientation -or even better to customer-orientation -which means that applications are becoming more and more dominant in driving innovations. Under this new paradigm, instead of technology roadmaps dominating the development of innovative products, the application requirements and customer needs determine which technology is best suited. An additional focus is arising on advanced packaging to enable smaller subsystems and system solutions. This paper analyzes why limits in performance, lithography and economics -and a shift in customer requirements -demand new types of innovation and discusses what will be the upcoming areas of interest for future research and development. The paradigm shift in the semiconductor industry is illustrated by recent examples from the communications and automotive segments that show how an application-oriented approach can achieve minimized system cost and optimized system functionality.

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Section: A System-on-chip Solutionsmentioning

confidence: 99%

Technical and economical trends in microelectronics

Ziebart

2007

ESSDERC 2007 - 37th European Solid State Device Research Conference

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“…Receiver approaches to cope with multi-mode functionality have been presented in [1]- [4]. Furthermore, the benefit of a digital frontend (DFE) for supporting different communication standards over a single receiver lineup is outlined in [5]- [7] and a combined solution of an analog and digital front-end on a single die has been demonstrated for the CDMA2000 standard in [8]. Using this mixed-signal approach, the present design was optimized to additionally cover the W-CDMA bands I, II and V, and GSM/EDGE in the low-and high band.…”

Section: Introductionmentioning

confidence: 99%

An adaptive multi-mode RF front-end for cellular terminals

Hueber¹,

Zipper²,

Stuhlberger³

et al. 2008

2008 IEEE Radio Frequency Integrated Circuits Symposium

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This paper presents a fully-integrated performanceon-demand receiver front-end for GSM/EDGE/W-CDMA/ CDMA2000 multi-mode cellular applications. The design's noise figure, linearity and selectivity are adapted depending on current environmental conditions and the selected standard to guarantee lowest overall power consumption. The single-chip zero-IF receiver comprises two self-matched LNAs for high/low-band, the demodulator and a fully-integrated ΔΣ−fractional−N PLL. The integration of I/Q-ADCs and a digital front-end (DFE) enables an efficient 3rd-order analog baseband filter. Accurate channel and matched filtering, sample-rate conversion and dynamic-range control are achieved in the DFE allowing for greater flexibility. In the absence of any blocker the performance of demodulator, VCO, analog baseband filter and DFE are adapted to reduce the current consumption up to 42 % versus the full-featured mode. The receiver has been fabricated in a 0.13 μm CMOS process and occupies 8 mm 2 die area. The design is verified by error-vector-magnitude (EVM) measurements exhibiting 3.9 % for W-CDMA and 3.1 % for CDMA2000.

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“…Recently published work on multi-mode wireless receivers includes [1], [2], [3], [4], [5], [6] where the analog front-end circuitry is adaptive or enhanced by some onchip digital signal processing capabilities, commonly called a digital front-end (DFE). Usually this DFE should account for most of the reconfigurability built into the receiver by simply adapting the programming of the signal processing building blocks in it.…”

Section: Introductionmentioning

confidence: 99%

Multi-Mode Receiver Design for Wireless Terminals

Hueber¹,

Stuhlberger

Holm

et al. 2007

2007 European Conference on Wireless Technologies

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The ongoing evolution from 2G to 3G and beyond confronts the cellular market with the challenges of a broad diversity of communication standards. Furthermore, increasing levels of integration with minimum external component count, advances in semiconductor process technology, and the requirement for multi-mode operation are pivotal demands of the RF-IC manufactures to achieve fast design cycles and low product cost. As a result, reconfiguration of the wireless terminal has become the key issue in the design of wireless terminals. This paper discusses the requirements for multi-mode reconfigurable wireless receivers with focus put onto mixed-signal and digital enhancements to traditional analog front-end designs. The flexibility a digitalfront-end (DFE) introduces is studied with respect to the main cellular communication standards (GSM/EDGE, CDMA2000, W-CDMA/HSDPA, and LTE) and satellite navigation systems (GPS, Galileo), with considerations of impacts on the capability of an implementation of a software-defined-radio (SDR).

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A 50mW HSDPA Baseband Receiver ASIC with Multimode Digital Front-End

Cited by 10 publications

References 3 publications

Technical and economical trends in microelectronics

Technical and economical trends in microelectronics

An adaptive multi-mode RF front-end for cellular terminals

Multi-Mode Receiver Design for Wireless Terminals

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