1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers
DOI: 10.1109/isscc.1992.200457
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A 5 V-only 0.6 mu m flash EEPROM with row decoder scheme in triple-well structure

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Cited by 5 publications
(8 citation statements)
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“…Charge-pump (CP) circuits are used to multiply the supply voltage (V dd ) to generate a high-voltage DC output. These circuits have a wide range of applications including liquid-crystal display (LCD) drivers, micro electro-mechanical systems (MEMS), power-supply generation, and the programming of nonvolatile memory ( [1][2][3][4]). Since charge pumps use switched-capacitor techniques to generate elevated voltages, the output of the charge pumps typically have significant ripple.…”
Section: Introductionmentioning
confidence: 99%
“…Charge-pump (CP) circuits are used to multiply the supply voltage (V dd ) to generate a high-voltage DC output. These circuits have a wide range of applications including liquid-crystal display (LCD) drivers, micro electro-mechanical systems (MEMS), power-supply generation, and the programming of nonvolatile memory ( [1][2][3][4]). Since charge pumps use switched-capacitor techniques to generate elevated voltages, the output of the charge pumps typically have significant ripple.…”
Section: Introductionmentioning
confidence: 99%
“…Charge pump circuits are usually applied to the nonvolatile memories, such as EEPROM or flash memories, to write or to erase the floating-gate devices [1]- [4]. In addition, charge pump circuits had been used in some low-voltage designs to improve the circuit performance [5], [6].…”
Section: Introductionmentioning
confidence: 99%
“…Thus, the output voltage of the charge pump circuit can be pumped high. The voltage fluctuation of each pumping node can be expressed as (1) where is the voltage amplitude of the clock signals, is the pumping capacitance, is the parasitic capacitance at each pumping node, is output current, and is the clock frequency. If and are small enough and is large enough, and can be ignored from (1).…”
Section: Introductionmentioning
confidence: 99%
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“…Most all-pFET CTS circuits are based upon the circuit shown in Fig. 8.5(b) [175]. The CTS is shown within the dashed line and consists of 1) M sw , the switch that transfers charge between neighboring stages; 2) M bt , a "boosting" switch that enforces the correct dc operating point onto the otherwise capacitively-coupled gate of M sw ; and 3) C bt , a capacitor that ac-couples the on/off clock (φ 1b ) up to the higher local voltage of the CTS.…”
Section: The Charge Pump Stagesmentioning
confidence: 99%