2018 IEEE Applied Power Electronics Conference and Exposition (APEC) 2018
DOI: 10.1109/apec.2018.8341558
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A 5-level high efficiency low cost Hybrid Neutral Point Clamped transformerless inverter for grid connected photovoltaic application

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Cited by 3 publications
(4 citation statements)
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“…The most important requirements stated in the previous section (i.e., efficiency higher than 95%, and THD of the output signals lower than 5%) can be achieved, and particularly with the NPC and FC topologies [34], [39]. Kadam et al have particularly highlighted that 5-level NPC topology requires a high number of semiconductor devices (i.e., 8 power switches to be controlled, and 4 diodes), and a high number of mandatory capacitors (i.e., 4 capacitors) for the required function [34]. Regarding the FC topology, Lei et al have highlighted that it is necessary to increase the number of levels (i.e., 7-level inverter structure), the number of semiconductor devices (i.e., 16 power switches to be controlled), and the number of mandatory capacitors (i.e., 6 capacitors) to meet the same performances as described above [39].…”
Section: Limitations Of Existing Dc-ac Topologiesmentioning
confidence: 94%
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“…The most important requirements stated in the previous section (i.e., efficiency higher than 95%, and THD of the output signals lower than 5%) can be achieved, and particularly with the NPC and FC topologies [34], [39]. Kadam et al have particularly highlighted that 5-level NPC topology requires a high number of semiconductor devices (i.e., 8 power switches to be controlled, and 4 diodes), and a high number of mandatory capacitors (i.e., 4 capacitors) for the required function [34]. Regarding the FC topology, Lei et al have highlighted that it is necessary to increase the number of levels (i.e., 7-level inverter structure), the number of semiconductor devices (i.e., 16 power switches to be controlled), and the number of mandatory capacitors (i.e., 6 capacitors) to meet the same performances as described above [39].…”
Section: Limitations Of Existing Dc-ac Topologiesmentioning
confidence: 94%
“…Table 1 sums up the main performances of such topologies reported in the literature [34][35][36][37][38][39][40][41][42]. The most important requirements stated in the previous section (i.e., efficiency higher than 95%, and THD of the output signals lower than 5%) can be achieved, and particularly with the NPC and FC topologies [34], [39]. Kadam et al have particularly highlighted that 5-level NPC topology requires a high number of semiconductor devices (i.e., 8 power switches to be controlled, and 4 diodes), and a high number of mandatory capacitors (i.e., 4 capacitors) for the required function [34].…”
Section: Limitations Of Existing Dc-ac Topologiesmentioning
confidence: 99%
“…In all three cases, only four active switches are used to realize the basic inverter circuit and reduce the leakage current until practically eliminate it. The reduction in common-mode frequency has also been achieved using transformerless topologies with multilevel neutral point clamp [68] or its variant, using split inductors [69].…”
Section: Common-grounded Invertermentioning
confidence: 99%
“…The self-balancing method is investigated in three-level NPC-MLI using carrier-based modulation [31][32][33][34][35][36][37][38]. The same self-balancing method nearest three vector selection is used in Hybrid Neutral Point Clamped transformerless inverter [39,40]. In [41], a modified SVM method is suggested with over modulation operation using small, medium, and zero vector switching vectors for mitigating the zero-sequence circulating current.…”
Section: Introductionmentioning
confidence: 99%