A 5-GHz frequency-doubling quadrature modulator with a ring-type local oscillator

Matsuoka, Hiroaki; Tsukahara, Takehiko

doi:10.1109/4.782096

Cited by 25 publications

(2 citation statements)

References 7 publications

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“…Recently, muti-phase VCOs have been used in direct conversion transceiver, clock generator, data recovery circuit, and phasedarray receiver [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16]. In the past, many topologies for eight-phase VCO [1][2][3][4][5][6][7] and quadrature voltage controlled oscillator (QVCO) [8 -16] have been proposed.…”

Section: Introductionmentioning

confidence: 99%

Quadrature and eight‐phase VCOs implemented with SiGe injection locked frequency dividers

Jang

Liu

Lee

et al. 2008

Micro & Optical Tech Letters

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This article proposes a new technique for designing multi-phase voltage controlled oscillators (VCOs), which were implemented in the standard TSMC 0.35 m SiGe 3P3M BiCMOS process. The quadrature voltage-controlled oscillator (QVCO) consists of two direct-injection locked frequency dividers (ILFDs) with a tail MOSFET. The 2nd harmonic frequency component at the drain node of tail transistor in one ILFD is injected to the gate of injection MOSFET in the other ILFD to couple the two independent ILFDs. The eight-phase VCO is also designed with similar technique to couple four differential VCOs. At the supply voltage of 3.0 V, the output phase noise of the QVCO is Ϫ118.22 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 2.28 GHz, and the figure of merit is Ϫ173.25 dBc/Hz. At the supply voltage of 3.0 V, the total power consumption is 14.4 mW. At the supply voltage of 3.0 V, the output phase noise of the eight-phase VCO is Ϫ116.14 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 2.92 GHz, and the figure of merit is Ϫ171.3 dBc/Hz.

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Section: Introductionmentioning

confidence: 99%

Quadrature and eight‐phase VCOs implemented with SiGe injection locked frequency dividers

Jang

Liu

Lee

et al. 2008

Micro & Optical Tech Letters

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“…The multi- [ 1] [2]. In wireless communication systems, the multi-phase clock signals are easily converted into the in-phase and quadrature (I/Q) signals with an n/4 radian difference essential for the down-conversion mixer, and make unnecessary to use an additional block such as a poly-phase filter for the I/Q generation [3].…”

Section: Introductionmentioning

confidence: 99%

A 1.8-GHz self-calibrated phase-locked loop with precise I/Q matching

Park

Kim²,

Kim

2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)

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A 1.8 GHz phase-locked loop (PLL) with a self-calibration circuit implemented in'0.35 pm CMOS process is presented. The calibration circuit continuously adjusts the delay mismatches among the delay cells in a ring-type voltage controlled oscillator (VCO) and automatically cancels the phase offsets in the multi-phase clock signals generated from the VCO. An edge-combining fractional-N frequency synthesizer with the self-calibrated PLL has been implemented and successfully eliminates -1 3 dBc fractional spur occurred by the delay mismatches in the VCO.synthesize the output signals. Consequently, the division ratio becomes (M+l/8). When the PLL is locked, the phase offset caused by the delay mismatches introduces phase errors at the input of the phase frequency detector (PFD) in the PLL. Fig 3 shows the input waveforms of the PFD. The amount of phase error, At, corresponds to the phase offset of the i-th delay cell. Since a PLL behaves to make the average phase error zero in the locking mode, the sum of the individual phase error becomes zero when the PLL is locked.In other word, At, + A t l i . . . i A t , = O .Assume the phase offset of the 1" delay cell is changed by All. Then, after the PLL is locked again, the resulted phase offset becomes:

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Low Power LC-Quadrature VCO with Superior Phase Noise Performance in 0.13 µm RF-CMOS Process for Modern WLAN Application

Khan

Balodi

Misra³

2022

Circuits Syst Signal Process

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A 5-GHz frequency-doubling quadrature modulator with a ring-type local oscillator

Cited by 25 publications

References 7 publications

Quadrature and eight‐phase VCOs implemented with SiGe injection locked frequency dividers

Quadrature and eight‐phase VCOs implemented with SiGe injection locked frequency dividers

A 1.8-GHz self-calibrated phase-locked loop with precise I/Q matching

Low Power LC-Quadrature VCO with Superior Phase Noise Performance in 0.13 µm RF-CMOS Process for Modern WLAN Application

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