A 45-GHz, 2-bit power DAC with 24.3 dBm output power, &amp;#x003E;14 V&lt;inf&gt;pp&lt;/inf&gt; differential swing, and 22% peak PAE in 45-nm SOI CMOS

Balteanu, Andreea; Sarkas, I.; Dacquay, E.; Tomkins, A.

doi:10.1109/rfic.2012.6242290

Cited by 11 publications

(3 citation statements)

References 6 publications

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“…This is 2.6 times more output power than a recently reported millimeter-Wave (mm-Wave) silicon-based PA [1]. The circuit is a fully integrated mm-Wave PA achieving a leading output power approaching 1 Watt in a silicon process.…”

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confidence: 84%

A 0.7W fully integrated 42GHz power amplifier with 10% PAE in 0.13µm SiGe BiCMOS

Tai

Carley

Ricketts

2013

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers

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In this paper, we report a fully integrated power amplifier (PA) architecture that combines the power of 16 on-chip PAs using a 16-way zero-degree combiner to achieve an output power of 0.7W with a power-added efficiency (PAE) of 10% at 42GHz and a -3dB bandwidth of 9GHz. This is 2.6 times more output power than a recently reported millimeter-Wave (mm-Wave) silicon-based PA [1]. The circuit is a fully integrated mm-Wave PA achieving a leading output power approaching 1 Watt in a silicon process.To date only a few published mm-Wave PAs in silicon have achieved a saturated output power of more than 20dBm (100mW) [2][3][4][5][6]. The difficulty in achieving high output powers at mm-Wave frequencies lies in the limited output power of a single PA, which is constrained by maximum current density, breakdown voltage and parasitics of the technology. Moreover, to obtain maximum power from a single PA, its output impedance must be lowered due to the relative low breakdown voltage of silicon devices. In fully integrated designs, this low impedance must then be impedance transformed to the desired output impedance through a lossy on-chip impedance transformer, reducing the overall net output power.Power combining multiple PAs is a common approach to obtaining larger output powers. As more unit PAs are combined, the required impedance transformation ratio as well as voltage and thermal stress on each unit PA is relaxed. However, the insertion loss of traditional power combiners, e.g. Wilkinson combiners [3] and transformer-based combiners [4,5], tends to scale up as the number of combined PAs increases due to increased size and complexity of the combiners. Part of the additional size and complexity stems from maintaining portto-port isolation in the combiner, particularly with Wilkinson combiners. If we assume, however, that all combiner inputs have zero-degree phase difference (i.e. in-phase), port isolation is no longer a major constraint. In this case, the requirement for exact quarter-wavelength segments in the Wilkinson combiner is removed and arbitrary line lengths can be used subject only to layout constraints and impedance transformation requirements. It is then possible to significantly reduce the combiner size and insertion loss while simultaneously achieving the desired impedance transformation. In this work, we combine the power of 16 PAs using a 16-way zero-degree combiner that achieves low insertion loss and wideband impedance transformation.The combiner is developed using scalable SPICE transmission line models derived from EM field simulations. The simulated insertion loss of the combiner is less than 0.5dB at 45GHz. It also performs the required impedance transformation and presents the optimum load impedance to each unit PA, whose value was obtained from load-pull simulations of the unit PA output stage. Since a dedicated impedance transformation network is no longer needed, the associated power loss is avoided. We improve the isolation between input ports to better than 10dB by inserting a small resistor b...

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confidence: 84%

A 0.7W fully integrated 42GHz power amplifier with 10% PAE in 0.13µm SiGe BiCMOS

Tai

Carley

Ricketts

2013

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers

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“…The critical issue pertaining to appropriate intermediary voltage swings is illustrated by means of a 2-stacked topology in [5]. To preserve input power and improve PAE at mmWave frequencies where devices have poor gain, usually only the bottom device is driven in a stacked configuration [2,4,7]. Consequently, we rely on the voltage swing of the lower device(s) to turn off the device(s) higher up the stack.…”

Section: Research Articlementioning

confidence: 99%

“…1 a ) [1] as well as switching‐class PAs (Fig. 1 b ) [2–4] have demonstrated the feasibility of implementing efficient stacked PAs in CMOS at mmWave frequencies with high output power.…”

Section: Introductionmentioning

confidence: 99%

Multi‐output stacked class‐E millimetre‐wave power amplifiers in 45 nm silicon‐on‐insulator metal–oxide–semiconductor: theory and implementation

Chakrabarti

Krishnaswamy

2015

IET Microwaves, Antennas & Propagation

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Series stacking of multiple devices in power amplifiers is a promising technique that has been explored recently at millimetre-wave frequencies to overcome some of the fundamental limitations of metal-oxide-semiconductor (CMOS) technology. Stacking multiple devices improve the output power and efficiency by increasing the achievable output voltage swing. Switching power amplifiers (PAs), such as Class-E PAs, are capable of high efficiency operation and can benefit from device stacking. This study presents a new topology for stacked Class-E-like PAs. In this technique, an appropriate Class-E load network is used for each stacked device, which imparts a true Class-E behaviour to all the devices in the stack. In addition, output power is available from multiple corresponding output nodes. The resulting topology is called the multi-output stacked Class-E PA. Two Q-band prototypesa unit cell with two devices stacked, and a power-combined version employing two such unit cellshave been fabricated in IBM's 45 nm silicon-oninsulator CMOS technology using the 56 nm body-contacted devices. Measurements yield a peak PAE of 25.5% for the unit cell with saturated output power of 17.9 dBm, and a peak PAE >16% for the power-combined version with saturated output power >19.1 dBm. Owing to the proposed technique, the performance metrics are at par with the current state-of-the-art despite the higher ON-resistance and poor f max of the body-contacted devices.

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Millimeter-Wave Stacked-Transistor Amplifiers

Preez

Sinha

2017

Millimeter-Wave Power Amplifiers

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A 45-GHz, 2-bit power DAC with 24.3 dBm output power, >14 V<inf>pp</inf> differential swing, and 22% peak PAE in 45-nm SOI CMOS

Cited by 11 publications

References 6 publications

A 0.7W fully integrated 42GHz power amplifier with 10% PAE in 0.13µm SiGe BiCMOS

A 0.7W fully integrated 42GHz power amplifier with 10% PAE in 0.13µm SiGe BiCMOS

Multi‐output stacked class‐E millimetre‐wave power amplifiers in 45 nm silicon‐on‐insulator metal–oxide–semiconductor: theory and implementation

Millimeter-Wave Stacked-Transistor Amplifiers

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A 45-GHz, 2-bit power DAC with 24.3 dBm output power, &#x003E;14 V<inf>pp</inf> differential swing, and 22% peak PAE in 45-nm SOI CMOS

Cited by 11 publications

References 6 publications

A 0.7W fully integrated 42GHz power amplifier with 10% PAE in 0.13&#x00B5;m SiGe BiCMOS

A 0.7W fully integrated 42GHz power amplifier with 10% PAE in 0.13&#x00B5;m SiGe BiCMOS

Multi‐output stacked class‐E millimetre‐wave power amplifiers in 45 nm silicon‐on‐insulator metal–oxide–semiconductor: theory and implementation

Millimeter-Wave Stacked-Transistor Amplifiers

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A 45-GHz, 2-bit power DAC with 24.3 dBm output power, >14 V<inf>pp</inf> differential swing, and 22% peak PAE in 45-nm SOI CMOS

A 0.7W fully integrated 42GHz power amplifier with 10% PAE in 0.13µm SiGe BiCMOS

A 0.7W fully integrated 42GHz power amplifier with 10% PAE in 0.13µm SiGe BiCMOS