A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor

Suntharalingam, V.; Berger, R.; Clark, Stewart; Knecht, J.M.; Messier, Andrew; Newcomb, Kevin; Rathman, D.D.; Slattery, R.L.; Soares, Anna Elis Paz; Stevenson, Charles; Warner, K.; Young, Douglas; Ang, Lin Ping; Mansoorian, B.; Shaver, David C.

doi:10.1109/isscc.2009.4977296

Cited by 34 publications

(15 citation statements)

References 5 publications

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“…Also, e.g. a shift with a length of 4 can be implemented simply by moving into the opposite direction in the lower neighborhood: East(4) = East(5) − West (1). Two examples are shown in Fig.…”

Section: Shift Implementation With Limited Neighborhood Connectionsmentioning

confidence: 99%

“…1, For highest possible efficiency, the data transfer between the computational array and the image sensor should be analog. The analog data transfer can be realized between different layers of a 3D-integrated integrated circuit, by using through-silicon vias [1]. Although A/D-conversion of the frame data is still required to provide standard format image stream output of the sensor-processor, and to store previous frames digitally, the current frame image may be applied directly from the sensor directly in analog form in the motion estimation.…”

Section: Introductionmentioning

confidence: 99%

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Rate-distortion performance analysis of an analog motion estimation array

Koskinen¹,

Poikonen

Laiho

et al. 2010

2010 IEEE International Conference on Acoustics, Speech and Signal Processing

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Emerging 3D-integration enables integrating high quality image sensors with various massively parallel processing elements. Analog motion estimation is one potential application, which is likely to result in significant benefits in the form of low power or high frame-rate 3D-integrated image sensorprocessors. The system-level operation of a proposed analog motion estimation array, enabling all various block sizes from 4x4 to 16x16 is examined. The analog motion estimation circuitry has been designed as a 32x32 test array in 0.13 μm CMOS technology. The transistor-level simulation results combined with H.264/AVC JM 14.2 show equivalent rate-distortion results with SAD as the error measure and an approximately 7% increase in bitrate with a slight increase in image quality for SSE.

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Section: Shift Implementation With Limited Neighborhood Connectionsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Rate-distortion performance analysis of an analog motion estimation array

Koskinen¹,

Poikonen

Laiho

et al. 2010

2010 IEEE International Conference on Acoustics, Speech and Signal Processing

View full text Add to dashboard Cite

show abstract

“…[29]. By stacking multiple SOI layers, 3D light sensing and processing circuits can be built, as shown by MIT LL [30]. Photonics SOI substrates provide an excellent platform for optical waveguides and complete photonic circuits operating at the typical telecom wavelengths of 1.31 and 1.55 µm [31].…”

Section: Cmos Imagers and 3d Applicationsmentioning

confidence: 99%

SOI Technology Driving the 21st Century Ubiquitous Electronics

Celler¹

2009

ECS Trans.

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Electronics is expanding into all spheres of our life, spreading far beyond computer systems, mobile telephony, and personal computers -into games, appliances, navigation systems, at-home health diagnostics, a variety of smart sensors at home, in cars and in the workplace. RFID chips are becoming integrated into paper documents, and various sensors are likely to be included in our clothing. Silicon-on-Insulator (SOI) based technology plays a growing role in many of these applications.

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“…While it is possible to tile smaller sensor die into a larger contiguous defect-free chip, this approach is difficult and costly [2,3]. One approach to avoid a monolithic focal plane is to allow spaces between the image sensor tiles, and use multiple imagers to fill in the interleaving image data, as in DARPA's ARGUS-IS.…”

Section: Introductionmentioning

confidence: 99%

Design and scaling of monocentric multiscale imagers

et al. 2012

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Monocentric multi-scale (MMS) lenses are a new approach to high-resolution wide-angle imaging, where a monocentric objective lens is shared by an array of identical rotationally symmetric secondary imagers that each acquire one overlapping segment of a mosaic. This allows gigapixel images to be computationally integrated from conventional image sensors and relatively simple optics. Here we describe the MMS design space, introducing constraints on image continuity and uniformity, and show how paraxial system analysis can provide both volume scaling and a systematic design methodology for MMS imagers. We provide the detailed design of a 120°field of viewimager (currently under construction) resolving 2 gigapixels at 41.5 μrad instantaneous field of view, and demonstrate reasonable agreement with the first-order scaling calculation.

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A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor

Cited by 34 publications

References 5 publications

Rate-distortion performance analysis of an analog motion estimation array

Rate-distortion performance analysis of an analog motion estimation array

SOI Technology Driving the 21st Century Ubiquitous Electronics

Design and scaling of monocentric multiscale imagers

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