A 4-GS/s 11.3-mW 7-bit Time-Based ADC With Folding Voltage-to-Time Converter and Pipelined TDC in 65-nm CMOS

Yi, Il-Min; Miura, Naoki; Nosaka, Hideyuki

doi:10.1109/jssc.2020.3025605

Cited by 23 publications

(2 citation statements)

References 20 publications

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“…Osheroff presented a current mirror structure to achieve high linearity and high speed but had disadvantage of high-power consumption. Jia proposed a VTC circuit based on Current starved Inverter which employed folded structure [14]. Linearity of the circuit was improved but the power consumption rose up.…”

Section: Introductionmentioning

confidence: 99%

A 13.42ps Resolution, Low-Power Time-to-Digital Converter and 0.519fJ Energy-Efficient Novel Voltage-to-Time Converter for High-Speed Time-Based ADC Application

Shukla¹

2022

JUSST

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Voltage domain ADC architectures require high gain and high bandwidth opamps to amplify the signal for successive stages. The opamp design gets a bit challenging due to noise, small gain and lower overdrive voltage. Due to these limitations, the inclination shifted towards high-speed converters which don’t require opamps. Time based Analog to Digital Converters (TBADC) is one such category of circuits. TBADCs are constituted from VTC followed by TDC with an encoder in the end. This work is concerned around the design of a high-resolution time to digital converter (TDC) and proposing a novel high-speed, low power consuming voltage to time converter (VTC) circuit. Both the circuits were implemented in Cadence Virtuoso EDA tool version 6.1.7 and Spectre was employed for running the simulations. TDC circuits had resolution of 13.425 ps and consume power of 1.873 μW. Process corner analysis and Monte Carlo analysis were performed on VTC design to determine worst possible deviations in performance. The proposed VTC exhibited delay of 23.79 ps with power consumption of 21.83 μW at 1 Volt. The presented TDC and VTC circuits can be used to design high-speed time-based Analog to Digital Converters.

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Section: Introductionmentioning

confidence: 99%

A 13.42ps Resolution, Low-Power Time-to-Digital Converter and 0.519fJ Energy-Efficient Novel Voltage-to-Time Converter for High-Speed Time-Based ADC Application

Shukla¹

2022

JUSST

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“…Time-domain signal exhibiting the advantage in SNR has received more attention, because the amplitude is unrelated to the supply voltage [3,4,5,6,7]. With the shrinking of the process, the delay time is decreased, which make the speed of TBADC faster [8,9,10].…”

Section: Introductionmentioning

confidence: 99%

A 8-bit, 1-GHz coarse-fine time-based ADC with split-CDAC residue transfer

Wan

Bao

Jin

et al. 2022

IEICE Electron. Express

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This letter proposed a coarse-fine two stages time-based analogto-digital converter (TBADC). The coarse 4-bit TBADC is pipelined with the fine 5-bit TBADC for high conversion rate. There is one bit redundancy to tolerate the gain and offset mismatch between the coarse and fine stages. The residue is transferred by splitting the capacitor array in a fully passive way, which is non-attenuated and consumes less power. The dynamic VTC in this design has a high linearity over a wide input range. The proposed ADC is designed in a 65-nm CMOS technology. It consumed 3.1 mW at 1 GHz and had a Walden figure of merit of 15.9 fJ/conversion step.

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Design techniques for voltage-to-time converters with nonlinearity emphasis

Yuan

2022

Analog Integr Circ Sig Process

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A 4-GS/s 11.3-mW 7-bit Time-Based ADC With Folding Voltage-to-Time Converter and Pipelined TDC in 65-nm CMOS

Cited by 23 publications

References 20 publications

A 13.42ps Resolution, Low-Power Time-to-Digital Converter and 0.519fJ Energy-Efficient Novel Voltage-to-Time Converter for High-Speed Time-Based ADC Application

A 13.42ps Resolution, Low-Power Time-to-Digital Converter and 0.519fJ Energy-Efficient Novel Voltage-to-Time Converter for High-Speed Time-Based ADC Application

A 8-bit, 1-GHz coarse-fine time-based ADC with split-CDAC residue transfer

Design techniques for voltage-to-time converters with nonlinearity emphasis

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