A 4×32 Gb/s 1.8 pJ/bit Collaborative Baud-Rate CDR with Background Eye-Climbing Algorithm and Low-Power Global Clock Distribution
Jihee Kim,
Jia Park,
Jiwon Shin
et al.
Abstract:This paper presents design techniques for an energyefficient multi-lane receiver (RX) with baud-rate clock and data recovery (CDR), which is essential for high-throughput lowlatency communication in high-performance computing systems. The proposed low-power global clock distribution not only significantly reduces power consumption across multi-lane RXs but is capable of compensating for the frequency offset without any phase interpolators. To this end, a fractional divider controlled by CDR is placed close to … Show more
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