A 3-D Crossbar Architecture for Both Pipeline and Parallel Computations

Aljafar, Muayad J.; Acken, John M.

doi:10.1109/tcsi.2021.3108564

Cited by 2 publications

(3 citation statements)

References 34 publications

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“…Works in [14,15,16] demonstrated fabrication and characterization of 3D stacked memristor crossbar arrays. Work in [25] presented a monolithically integrated 3-D metal-oxide memristor crossbar circuit suitable for analog, and in particular, neuromorphic computing applications.…”

Section: Related Workmentioning

confidence: 99%

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Memristor Crossbar Scaling Limits and the Implementation of Large Neural Networks

Hasan

2023

Preprint

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Memristor crossbar-based neural networks perform parallel operation in the analog domain. Ex-situ training approach needs to program the predetermined resistance values to the memristor crossbar. Because of the stochasticity of the memristor devices, programming a memristor needs to read the device resistance value iteratively. Reading a single memristor in a crossbar (without isolation transistor) is challenging due to the sneak path current. Programming a memristor in a crossbar to either RON or ROFF state is relatively straightforward. A neural network implemented using higher precision weights provides higher classification accuracy compared to a Ternary Neural Network (TNN). This paper demonstrates the implementation of memristor-based neural networks using only the two resistance values (RON, ROFF). We have considered the crossbar scaling limits and proposed a novel technique to implement a large neural network using multiple smaller crossbar arrays. We have proposed novel neuron circuits to achieve higher weight precision. Our experimental result shows that the proposed higher precision synapses are easy to program and provide better classification accuracy compared to a TNN. Proposed technique of implementing a large neural network on memristor crossbar circuits has a slight loss in the classification accuracy compared to the software implementation. But the memristor-based implementation uses only 51.7% of the synapses used in the software implementation.

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Section: Related Workmentioning

confidence: 99%

“…Several previous works examined memristor-based neural network implementation, but did not examine the crossbar scaling limits. Several works examined fabrication and characterization of 3D stacked memristor array [14,15,16]. Utilizing 3D stacked crossbar array we can significantly reduce the wiring complexity in a neural network circuit.…”

Section: Introductionmentioning

confidence: 99%

Memristor Crossbar Scaling Limits and the Implementation of Large Neural Networks

Hasan

2023

Preprint

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“…Moreover, in-memory computing is a promising candidate for enhancing the time complexity, viz., the amount of computational time utilized to run an algorithm, of computing workloads. [21][22][23] A high degree of parallelism enabled by a large ensemble of memory units that administer a computing task results in the improved time complexity. Furthermore, the time complexity decreases with an increase in the degree of connectivity between memory units.…”

Section: Introductionmentioning

confidence: 99%

Nonvolatile Memristive Materials and Physical Modeling for In‐Memory and In‐Sensor Computing

Go,

Lim,

Lee

et al. 2024

Small Science

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Separate memory and processing units are utilized in conventional von Neumann computational architectures. However, regarding the energy and the time, it is costly to shuffle data between the memory and the processing entity, and for data‐intensive applications associated with artificial intelligence, the demand is ever increasing. A paradigm shift in traditional architectures is required, and in‐memory computing is one of the non‐von‐Neumann computing strategies. By harnessing physical signatures of the memory, computing workloads are administered in the same memory element. For in‐memory computing, a wide range of memristive material (MM) systems have been examined. Moreover, developing computing schemes that perform in the same sensory network and that minimize the data shuffle between the processing unit and the sensing element is a requirement, to process large volumes of data efficiently and decrease the energy consumption. In this review, an overview of the switching character and system signature harnessed in three archetypal MM systems is rendered, along with an integrated application survey for developing in‐sensor and in‐memory computing, viz., brain‐inspired or analogue computing, physical unclonable functions, and random number generators. The recent progress in theoretical studies that reveal the structural origin of the fast‐switching ability of the MM system is further summarized.

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A 3-D Crossbar Architecture for Both Pipeline and Parallel Computations

Cited by 2 publications

References 34 publications

Memristor Crossbar Scaling Limits and the Implementation of Large Neural Networks

Memristor Crossbar Scaling Limits and the Implementation of Large Neural Networks

Nonvolatile Memristive Materials and Physical Modeling for In‐Memory and In‐Sensor Computing

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