A 290-&amp;#x00B5;W 25-kHz continuous-time delta-sigma modulator for acoustic sensor networks

Choi, Yu Yong; Kim, Hyungjoong; Roh, Hyungdong; Roh, Jeongjin

doi:10.1109/asicon.2009.5351278

Cited by 2 publications

(2 citation statements)

References 12 publications

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“…Continuous and discrete time delta-sigma modulators have recently been used in sensor networks and biomedical applications, providing high resolution at low power consumption [27], [28], [29]. Continuous time delta sigma modulators have several advantages over their discrete time counterparts.…”

Section: B Delta-sigma Adcmentioning

confidence: 99%

A Receiver Architecture for Devices in Wireless Body Area Networks

Sjöland

Anderson

Bryant

et al. 2012

IEEE J. Emerg. Sel. Topics Circuits Syst.

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A receiver architecture suitable for devices in wireless body area networks is presented. Such devices require minimum physical size and power consumption. To achieve this the receiver should therefore be fully integrated in state-of-the-art CMOS technology, and size and power consumption must be carefully considered at all levels of design. The chosen modulation is frequency shift keying, for which transmitters can be realized with high efficiency and low spurious emissions. A directconversion receiver architecture is used to achieve minimum power consumption and a modulation index equal to two is chosen, creating a mid-channel notch in the modulated signal. A tailored demodulation structure has been designed to make the digital baseband compact and low power. To increase sensitivity it has been designed to interface with an analog decoder. Implementation in the analog domain minimizes the decoder power consumption. Antenna design and wave propagation are taken into account via simulations with phantoms. The 2.45 GHz ISM band was chosen as a good compromise between antenna size and link loss. An ultra-low power medium access scheme has been designed, which is used both for system evaluation and for assisting system design choices. Receiver blocks have been fabricated in 65-nm CMOS, and an RF front-end and an analogto-digital converter have been measured. Simulations of the complete baseband have been performed, investigating impairments due to 1/f noise, frequency and time offsets. Index Terms-Body sensor networks, CMOS integrated circuits, Low power electronics, Receivers, System-on-a-chip I. INTRODUCTION HERE are numerous applications for ultra-low power wireless communication. For instance, it can benefit such different areas as health care [1] and smart buildings [2], [3]. To achieve ultra-low power consumption it is important to combine low-power transceiver circuits with optimized communication protocols. In medical implants this is critical Manuscript received October 6, 2011.

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Section: B Delta-sigma Adcmentioning

confidence: 99%

A Receiver Architecture for Devices in Wireless Body Area Networks

Sjöland

Anderson

Bryant

et al. 2012

IEEE J. Emerg. Sel. Topics Circuits Syst.

View full text Add to dashboard Cite

show abstract

“…Data converters based on the ΔΣ modulation are widely used to digitize smallamplitude, low-frequency signals generated by sensors [3,5,6,12]. One of the main requirements in these applications is a large dynamic range.…”

Section: Introductionmentioning

confidence: 99%

Decimation of Delta-Sigma-Modulated Signals Using a Low-Cost Microcontroller

Fishta

Fiori

2021

Circuits Syst Signal Process

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Abstract$$\varDelta \varSigma $$ Δ Σ analog-to-digital converters (ADCs) are largely used in sensor acquisition applications. In the last few years, standalone $$\varDelta \varSigma $$ Δ Σ modulators have become increasingly available as off-the-shelf parts. To build a complete ADC, a standalone modulator has to be paired with some advanced elaboration unit, such as a field programmable gate array (FPGA) or a digital signal processor (DSP), which is needed for the implementation of the decimation filter. This work investigates the use of low-cost, general-purpose microcontrollers for the decimation of $$\varDelta \varSigma $$ Δ Σ -modulated signals. The main challenge is given by the clock frequency of the modulator, which can be in the range of a few $$\hbox {MHz}$$ MHz . The proposed technique deals with this limitation by employing two serial peripheral interface (SPI) modules in a time-interleaved configuration. This approach allows for continuous acquisition and elaboration of relatively high-speed, digital signals. The technique has been applied to a case study, and a data conversion system has been practically realized. The performance of the proposed filter is compared to that of a digital filter, present on board a commercial microcontroller, and the results of experimental tests are provided.

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A 290-µW 25-kHz continuous-time delta-sigma modulator for acoustic sensor networks

Cited by 2 publications

References 12 publications

A Receiver Architecture for Devices in Wireless Body Area Networks

A Receiver Architecture for Devices in Wireless Body Area Networks

Decimation of Delta-Sigma-Modulated Signals Using a Low-Cost Microcontroller

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