A 28GHz Low-Phase-Noise CMOS VCO Using an Amplitude-Redistribution Technique

Wachi, Yusuke; Nagasaku, Toshiyuki; Kondoh, Hiroshi

doi:10.1109/isscc.2008.4523267

Cited by 30 publications

(11 citation statements)

References 5 publications

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“…There are several circuit techniques for improving the phase noise of VCOs, e.g., applying a filtering technique to the NMOS and PMOS tail nodes [1], [2], the class-C CMOS VCO [3], and the amplitude-redistribution technique [4]. However, the phase noise is basically limited by the quality factor of the inductors.…”

Section: Introductionmentioning

confidence: 99%

Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators

Murakami

Hara

Okada

et al. 2010

IEICE Trans. Electron.

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In this paper we present a study on the design optimization of voltage-controlled oscillators. The phase noise of LC-type oscillators is basically limited by the quality factor of inductors. It has been experimentally shown that higher-Q inductors can be achieved at higher frequencies while the oscillation frequency is limited by parasitic capacitances. In this paper, the minimum transistor size and the degradation of the quality factor caused by a switched-capacitor array are analytically estimated, and the maximum oscillation frequency of VCOs is also derived from an equivalent circuit by considering parasitic capacitances. According to the analytical evaluation, the phase noise of a VCO using a 65 nm CMOS is 2 dB better than that of a 180 nm CMOS.

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Section: Introductionmentioning

confidence: 99%

Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators

Murakami

Hara

Okada

et al. 2010

IEICE Trans. Electron.

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“…Since the choke inductor occupies almost twice the area of the core resonant inductor, removing the choke inductor reduces the chip area significantly. It is also a design issue of the dual inductor LiT VCO of which the resonance frequency may not be unique [2]. The resonance frequency of the proposed NP-core LiT VCO is obviously unique.…”

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confidence: 99%

“…Among various CMOS VCO architectures, class-C VCOs show superior performance [1], but their design is not easy in high gigahertz (GHz) or mm-wave range due to incomplete switching of active devices. To improve phase noise in near mm-wave range, the LiT VCO techniques were reported [2,3], which showed good phase noise performance, but are annoyed by the increase of chip size and ambiguity of oscillation frequency due to use of dual inductors. This Letter proposes an NP-core CMOS LiT VCO, which implements the LiT technique with the reduced chip size and unique resonance frequency.…”

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confidence: 99%

“…1b is replaced with a P-channel (PMOS) pair. The original LiT VCO achieves transconductance linearisation reducing the voltage swing on drain nodes by using a choke inductor, an LC tank resonant inductor, and a capacitive divider [2,3]. Since the choke inductor occupies almost twice the area of the core resonant inductor, removing the choke inductor reduces the chip area significantly.…”

mentioning

confidence: 99%

“…Table 1 summarises the performance of the proposed VCO with the comparison. The figure of merit (FoM) and FoM normalised to the area (FoM A ) are determined using (1) and (2), respectively, where L(Δf ) is phase noise, f o is the oscillation frequency, and Δf is the offset frequency. P DC (mW) and area(mm 2 ) are the DC power consumption and size of the VCO core…”

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Compact CMOS LiT VCO achieving 198.6 dBc/Hz FoM _A

et al. 2018

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A compact CMOS linear transconductance (LiT) voltage-controlled oscillator (VCO) in 65 nm CMOS process is presented. The proposed LiT technique is realised using NP core without a choke inductor to reduce die area and avoid dual resonance problem. The measured output frequency of the proposed VCO shows 11.18-11.98 GHz and phase noise is −112.62 dBc/Hz at 1 MHz offset frequency. DC power consumption of the VCO core and the buffer is 5.86 and 6 mW, respectively. It achieves a high figure of merit normalised to the area of 198.6 dBc/Hz.

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A 5‐GHz low‐phase noise CMOS VCO with swing boosting technique

Liu

Liao

Huang

2009

Micro & Optical Tech Letters

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ring for the measured ON state and Ϫ10 MHz for the measured OFF state.The results in Figure 4 show that the presence of the metallic reflector positioned behind the FSS results in two frequency bands, 3.25 GHz (ON), and 4.35 GHz (OFF). At both these frequencies, destructive interference is occurring leading to the signal returning to Port 1 being attenuated by Ϫ12 dB (ON) and Ϫ20 dB (OFF), respectively. This behavior suggests that the screen can exhibit the same functional behavior as a reflection canceller, i.e., the energy returned to the excitation source is reduced, albeit over a small frequency range. A second interesting feature of this arrangement is that at either 3.25 GHz or 4.35 GHz by toggling between ON and OFF states, the incident signal reflected from the surface can be amplitude shift keyed since at either of these frequencies d.c. switching of the pin diode causes the FSS to alter between near total reflection or near total return signal cancellation. CONCLUSIONSThe tunable characteristic response of a wire strip FSS structure center loaded with beam lead pin diodes was investigated both numerically and experimentally. It was shown that the surface can be operated as an electronic shutter allowing energy to be selectively transmitted or reflected with in excess of 20 dB isolation between them being obtained in two distinct frequency bands. This attribute of the structure should be useful for EMC energy control by acting as a spatial switch or for agile radome applications. It was also shown that the inclusion of a ground plane placed behind the structure leads to destructive interference, again occurring at two distinct frequencies and chosen by whether the pin diode ON or OFF condition is selected. Again through d.c. pin bias control, the arrangement can be made almost entirely reflective at these frequency points. This means that the structure can be dynamically switched to produce ASK backscattered encoded energy when dynamically switched, or when statically operated as a reflector or narrowband refection canceller. These properties could be exploited for RFID or agile radar cross-section applications.

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A 28GHz Low-Phase-Noise CMOS VCO Using an Amplitude-Redistribution Technique

Cited by 30 publications

References 5 publications

Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators

Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators

Compact CMOS LiT VCO achieving 198.6 dBc/Hz FoM _A

A 5‐GHz low‐phase noise CMOS VCO with swing boosting technique

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A 28GHz Low-Phase-Noise CMOS VCO Using an Amplitude-Redistribution Technique

Cited by 30 publications

References 5 publications

Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators

Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators

Compact CMOS LiT VCO achieving 198.6 dBc/Hz FoM A

A 5‐GHz low‐phase noise CMOS VCO with swing boosting technique

Contact Info

Product

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Compact CMOS LiT VCO achieving 198.6 dBc/Hz FoM _A