A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24–30-GHz Sliding-IF 5G Transceivers

Ek, Staffan; Pahlsson, Tony; Elgaard, Christian; Carlsson, Anders; Axholt, Andreas; Stenman, Anna-Karin; Sundstrom, L.; Sjöland, Henrik

doi:10.1109/jssc.2018.2820149

Cited by 55 publications

(19 citation statements)

References 19 publications

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“…25d illustrates the S-parameter results of the array. It is evident that the proposed linear array provides a very wide impedance bandwidth of 23.5-32 GHz covering different mm-Wave 5 G bands including 26, 28 and 30 GHz [46][47][48]. In addition, sufficient mutual coupling (<−17 dB) has been achieved for the antenna elements.…”

Section: Integration Of Mm-wave Phased Array Onto the Proposed Mimo Smentioning

confidence: 85%

Orthogonally dual‐polarised MIMO antenna array with pattern diversity for use in 5G smartphones

Parchin

Al‐Yasir

Basherlou

et al. 2020

IET Microwaves, Antennas & Propagation

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A new multiple‐input/multiple‐output (MIMO) antenna design is introduced for future smartphones. The proposed design contains four pairs of double‐fed circular‐ring resonators located at different edges of the smartphone printed circuit board (PCB) with an FR‐4 substrate and a dimension of 75 × 150 mm2. The antenna elements are fed by 50‐Ohm microstrip‐lines and provide polarisation and radiation pattern diversity function due to the orthogonal placement of their feed lines. By inserting a rectangular slot under each microstrip feed‐line, the mutual coupling characteristic of the antenna ports is reduced. A good frequency bandwidth (S11 ≤ − 10 dB) of 3.3–3.9 GHz has been obtained for the smartphone antenna array. Nevertheless, for S11 ≤ − 6 dB, this value is 3.1–4.3 GHz. More than 3 dB realised gain and 80% total efficiency are achieved for the single‐element radiator. The design provides not only sufficient radiation coverage supporting different sides of the mainboard but also the polarisation diversity. In addition, sufficient properties are obtained in the vicinity of human‐hand/human‐head. The proposed MIMO antenna design is also capable to generate dual‐ or multi‐band function. Moreover, a new and compact phased array millimeter‐wave (mm‐wave) antenna design with end‐fire radiation beams is introduced which can be easily integrated into smartphones.

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Section: Integration Of Mm-wave Phased Array Onto the Proposed Mimo Smentioning

confidence: 85%

Orthogonally dual‐polarised MIMO antenna array with pattern diversity for use in 5G smartphones

Parchin

Al‐Yasir

Basherlou

et al. 2020

IET Microwaves, Antennas & Propagation

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“…by linear settling. In [13] such a technique is used, with a successive approximation register. The frequency divider of the PLL is then set to the target value, and the divided frequency with different digital oscillator control words is measured using a counter.…”

Section: Pll Architecturementioning

confidence: 99%

“…For instance, using 7-bit precision to provide margin against cycle slips in the lownoise mode requires counting about 2 7 = 128 cycles. Since the clocks are not synchronized, an error of up to one cycle can occur [13]. This means that the measurement interval must be doubled.…”

Section: Pll Architecturementioning

confidence: 99%

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A 10-mW mm-Wave Phase-Locked Loop With Improved Lock Time in 28-nm FD-SOI CMOS

Abdulaziz

Forsberg

Törmänen

et al. 2019

IEEE Trans. Microwave Theory Techn.

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“…oscillator, at the expense of chip area [1]. Lately, PLLs utilizing high frequency crystal and large loop bandwidth have demonstrated low phase noise at mm-wave bands [2]- [4]. However, such crystal is expensive and would increase system cost.…”

mentioning

confidence: 99%

A Cascaded Mode-Switching Sub-Sampling PLL With Quadrature Dual-Mode Voltage Waveform-Shaping Oscillator

Shu

Qian

Luo

2021

IEEE Trans. Circuits Syst. I

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A cascaded mode-switching sub-sampling PLL with quadrature dual-mode voltage waveform-shaping oscillator is proposed in this paper. The dual-mode voltage waveform-shaping oscillator is introduced to extend the tuning range and improve phase noise performance at mm-wave frequency, simultaneously. Meanwhile, the dual-mode quadrature topology is investigated to reduce the phase noise and quadrature phase error, compared to conventional quadrature oscillator. Then, the proposed oscillator is applied in a cascaded PLL with divider-less mode-switching sub-sampling loop, which can obtain the merits of high frequency-resolution, low loop noise, and wide frequency locking range. Both the dual-mode voltage waveform-shaping oscillator and the cascaded PLL are verified and fabricated in a 28-nm CMOS process. The FoM and FoM T of the oscillator at 10 MHz offset are −188.2 dBc/Hz and −200.7 dBc/Hz respectively. The proposed PLL prototype exhibits a frequency range from 22.8 to 33.9 GHz with a typical power consumption of 41.7 mW. The phase noise across the frequency band is from −104.1 to −108.2 dBc/Hz at 1 MHz offset. The jitter FoM j is −236.2 dB.

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A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24–30-GHz Sliding-IF 5G Transceivers

Cited by 55 publications

References 19 publications

Orthogonally dual‐polarised MIMO antenna array with pattern diversity for use in 5G smartphones

Orthogonally dual‐polarised MIMO antenna array with pattern diversity for use in 5G smartphones

A 10-mW mm-Wave Phase-Locked Loop With Improved Lock Time in 28-nm FD-SOI CMOS

A Cascaded Mode-Switching Sub-Sampling PLL With Quadrature Dual-Mode Voltage Waveform-Shaping Oscillator

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