A 28-GHz-band Stacked FET Linear Power Amplifier IC with 36.2 % PAE at 3-dB back-off from P1dB in 56-nm SOI CMOS

Chen, Cuilin; Sugiura, T.; Yoshimasu, Toshihiko

doi:10.1109/rws.2019.8714268

Cited by 4 publications

(1 citation statement)

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“…With the demand of social life for communication, the power of radio frequency signal is also increasing. To ensure the amplification linearity of the linear power amplifier, the working range of the linear power amplifier must return to the power back-off area [17] [18]. In the application design of modern digital transmitter, switching power amplifier has gradually become a better choice because of the problem of power back-off.…”

Section: Introductionmentioning

confidence: 99%

An all-digital RF transmitter architecture based on jitter-enhanced PWM for flexible frequency applications

Long,

Chen,

et al. 2024

Preprint

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We propose a novel flexible jitter-enhanced pulse width modulation(PWM) hardware architecture, which aims to improve the modulation resolution while reducing the requirement of PWM frequency.The architecture creatively distributes the jitter effect uniformly to every radio frequency(RF) cycle corresponding to the same baseband cycle by controllable jitter, which provides a new modulation resolution growth method in the time domain. The architecture provides flexibility to adapt to different basebands and radio frequencies. By using jitter, the modulation resolution of this paper can improve 5.32 bit at most, and the EVM performance can reach -40.63db. The architecture proposed in this paper can use lower PWM frequency of 200MHz, which greatly reduces the frequency requirement of switching power amplifier in RF transmitting system. The jitter method proposed in this paper significantly improves the low modulation resolution of the traditional PWM all-digital RF transmitter and greatly changes the efficiency of all digital transmitters in the wireless communication system.

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Section: Introductionmentioning

confidence: 99%