A 24-GHz transformer-based stacked-FET power amplifier in 90-nm CMOS technology

Alsuraisry, Hamed; Cheng, Jen-Hao; Luo, Shih-Jyun; Lin, Wen-Jie; Tsai, Jeng-Han; Huang, Tian-Wei

doi:10.1109/apmc.2015.7413434

Cited by 6 publications

(2 citation statements)

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“…Owing to the intrinsic drawbacks of standard CMOS process, namely, low breakdown voltage, low power gain (PG), and large substrate loss at high frequency perspectives, the design of a PA at K band in CMOS with satisfactory performance is still a challenging task. Nevertheless, there have been many attempts to design PAs at K band in CMOS over the last decade 6–11 . Joshin et al, adopted the two‐stage cascode configuration and off‐chip Wilkinson power divider and combiner topology for the PA design.…”

Section: Introductionmentioning

confidence: 99%

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A K‐band high‐gain power amplifier with slow‐wave transmission‐line transformer in 130‐nm RF CMOS

Hou

Pan

et al. 2021

Circuit Theory & Apps

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Summary This paper presents a K‐band high‐gain Class‐A power amplifier (PA) with the two‐way combining approach in GSMC 130‐nm radio frequency (RF) complementary metal oxide semiconductor (RF CMOS). At the input, a slow‐wave transmission‐line transformer (S‐TLT) matching network is proposed for simultaneously realizing the impedance transformation and the single‐ended RF signal to differential conversion. Transmission‐line transformers (TLTs) are employed between the stages for coupling and inter‐stage matching. To improve the output power and efficiency, the placing and routing of the transistor layout are considered carefully for power stages to reduce the interconnecting and overlapping parasitics significantly. The PA has been fabricated and achieved good matching at 25 GHz, power gain of 17.8 dB, saturated output power of 14.9 dBm, output 1‐dB compression point of 12.4 dBm, and power added efficiency of 13.7% at a supply voltage of 1.5 V.

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Section: Introductionmentioning

confidence: 99%

“…A PA with the transformer‐based stacked‐FET topology was proposed by Alsuraisry et al, in 90‐nm CMOS. The PA achieved OP 1dB of 18.9‐dBm and 11.5‐dB small signal gain 7 . Jen et al, reported a 20 to 24 GHz fully integrated PA with lumped‐element components for matching purpose and cascode structure for gain boosting 8 .…”

Section: Introductionmentioning

confidence: 99%