2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers 2009
DOI: 10.1109/isscc.2009.4977364
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A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element

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Cited by 47 publications
(28 citation statements)
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“…2, the change in the width of the pulse corresponds to the AC amplitude. The benefit of using this measurement technique is that it is scalable since the required information can be easily measured using a low power TDC integrated on chip in modern CMOS nodes where high time resolution can be reached due to high device f t available in these processes [27]- [29].…”
Section: Heterodyned Sensor Architecture For Frequency Domain Nirsmentioning
confidence: 99%
“…2, the change in the width of the pulse corresponds to the AC amplitude. The benefit of using this measurement technique is that it is scalable since the required information can be easily measured using a low power TDC integrated on chip in modern CMOS nodes where high time resolution can be reached due to high device f t available in these processes [27]- [29].…”
Section: Heterodyned Sensor Architecture For Frequency Domain Nirsmentioning
confidence: 99%
“…The time-domain signal processing nature of the proposed -PWD architecture allows the SR-RX to be less sensitive to analog nonidealities and PVT variations [21]. Furthermore, such digitally enhanced approach will lead to a more energy-efficient operation in advanced deep-submicrometer CMOS processes.…”
Section: Discussionmentioning
confidence: 99%
“…One recent trend to alleviate such difficulties is to shift voltage-domain analog processing into the time-domain to take better advantage of the power-efficient and scalable digital circuits: time-based [2] and voltage-controlled oscillatorbased ADCs [3]. A time-domain ADC architecture that implements pulse width modulator (PWM) and time-todigital converter (TDC) in feedback loop is presented [4]. This architecture improves the linearity of PWM.…”
Section: Introductionmentioning
confidence: 99%