A 2.4GHz 1.8-V CMOS Sub-harmonic Mixer with Inherent Harmonic-Rejection

Gilasgar, Mitra

doi:10.1109/isms.2010.79

2010 International Conference on Intelligent Systems, Modelling and Simulation 2010

DOI: 10.1109/isms.2010.79

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A 2.4GHz 1.8-V CMOS Sub-harmonic Mixer with Inherent Harmonic-Rejection

Mitra Gilasgar

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2013

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A Low Power CMOS Bulk-Controlled Sub-Harmonic Mixer for LTE-Advanced Applications

Wei

Hsiao

2013

AMM

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In this paper, a 3.5 GHz CMOS sub-harmonic mixer for LTE-advanced applications is presented. The mixer with the bulk-controlled technique improves the linearity and mitigates the power of the local oscillator. The proposed mixer is implemented by tsmc 0.18 μm Mixed Signal RF CMOS 1P6M process and consumes 2.2 mA from a 1.2 V supply. The proposed mixer operates at 3.5GHz LTE-advanced bands and achieves maximum input third-order intercept point (IIP3) of 2.3dBm, power conversion gains of 1.3 dB.

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A Low Power CMOS Bulk-Controlled Sub-Harmonic Mixer for LTE-Advanced Applications

Wei

Hsiao

2013

AMM

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show abstract

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A 2.4GHz 1.8-V CMOS Sub-harmonic Mixer with Inherent Harmonic-Rejection

Cited by 1 publication

References 16 publications

A Low Power CMOS Bulk-Controlled Sub-Harmonic Mixer for LTE-Advanced Applications

A Low Power CMOS Bulk-Controlled Sub-Harmonic Mixer for LTE-Advanced Applications

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