A 2.2-mW Backgate Coupled <formula formulatype="inline"> <tex>$LC$</tex></formula> Quadrature VCO With Current Reused Structure

Abstract

The switching-capacitor current-reused LC-VCOs with degeneration resistors and capacitors have been presented in this article. Two switching-capacitor current-reused LC-VCOs are designed and measured. One uses one set of switching capacitor. The other uses two sets of switching capacitors. The former divides the frequency band into two sub-bands. However, the latter divides the frequency band into four sub-bands. The proposed VCOs reuse the dc current and have lower power consumption as compared with those of conventional VCO topologies. The usage of two degenerated resistors at the source terminals of NMOS and PMOS transistors enhances the characteristics of symmetry of differential outputs. The topology of switching capacitor results in smaller KVCO by dividing the wanted frequency range into two sub-band or four bands. Hence, the phase noise is indeed improved. The proposed current-reused LC-VCO is designed for applications on the communication systems operating at the frequencies from 2.3 to 2.7 GHz. For the VCO with two sub-bands, measured phase noise characteristics show À106.65 and À123.65 dBc/Hz at 100 kHz and 1 MHz offset from 2.38 GHz, respectively at a consumption current of 3 mA from a 1.8 V supply. The output power is up to 3.6 dBm. For the VCO with four sub-bands, measured phase noise characteristics show À104.85 and À124.6 dBc/Hz at 100 kHz and 1 MHz offset from 2.359 GHz, respectively at a consumption current of 2.6 mA from a 1.8 V supply. The output power is up to 4.14 dBm. The research results show that the phase noise characteristics are good by dividing the frequency band into multiple subbands and then reducing KVCO. ACKNOWLEDGMENTSThis work is supported by the National Science Council in Taiwan. The project contract number is NSC96-2220-E-022-001. The authors thank the Chip Implementation Center (CIC) of National Science Council, Taiwan, ROC, for the support of the TSMC CMOS processes. SCALEABLE COMPREHENSIVE LOW-NOISE PHEMT MODEL THAT PREDICTS IP3 AND NOISE

A 1V wide-tuning range quadrature VCO

“…And the phase error is about 3.6°. Table II demonstrates the comparison of the proposed VCO and recently published papers [7][8][9][10]. As shown in Table II, this circuit has lower power consumption and better tuning range as compared with the other works.…”

A Low Phase-Noise QVCO With Integrated Back-Gate Coupling and Source Resistive Degeneration Technique

“…The measured QVCO performance is summarized in Table I, where the published CMOS QVCOs are also listed [5], [7], [14]- [17]. Our designed QVCO has the lowest close-in phase noise of dBc/Hz at 1 MHz offset.…”

“…There are various ways to generate the quadrature-phase signal, such as the ring oscillator method [1], the differential voltage-controlled oscillator (VCO) with an RC poly-phase filter [2], the frequency division method [3] and the quadrature coupling of differential VCOs [4]- [7]. The quadrature coupling method is widely used because of its better phase noise performance.…”

“…The quadrature coupling method is widely used because of its better phase noise performance. The quadrature coupling can be carried out by adding extra transistors in series or parallel to the oscillating core [4], [5] or by the back-gate of the oscillating core transistor [6], [7]. On the other hand, the source resistive degeneration was shown having pronounced phase noise reduction effect on the differential VCO [8], [9].…”

CMOS QVCO With Current-Reuse, Bottom-Series Coupling, and Forward Body Biasing Techniques

“…However, having the coupling transistors in parallel with the switching transistors degrades the phase noise and increases the power dissipation. A back-gate coupled QVCO (BG-QVCO) was proposed to reduce the phase noise and the power consumption [2]. Nevertheless, it had a low quality factor ( -factor) in terms of the resonator phase shift.…”