A 170-dB $\Omega $ CMOS TIA With 52-pA Input-Referred Noise and 1-MHz Bandwidth for Very Low Current Sensing

Taherzadeh-Sani, Mohammad; Hussaini, Said; Rezaee-Dehsorkh, Hamidreza; Nabki, Frédéric; Sawan, Mohamad

doi:10.1109/tvlsi.2017.2654452

Cited by 33 publications

(14 citation statements)

References 23 publications

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“…Because capacitive feedback TIA offers lower input-referred noise as compared to that of the resistive feedback TIA, it is preferred in most of the high-resolution current sensor interfaces [9]. However, both the DT and CT implementation scheme mentioned-above still have many drawbacks to be addressed, such as the charge injection and KTC noise issues in the DT scheme, or the noise associated with the feedback path in the CT scheme.…”

Section: B Capacitive Feedback Tiamentioning

confidence: 99%

“…The integral of the input current is present at the integrator output; thus, a differentiator is required to restore the actual input signal information and have a constant gain within the desired signal bandwidth. The transimpedance gain and the output voltage of integrator-differentiator architecture can be expressed as [9]:…”

Section: B Continuous Time Approach With Active Feedbackmentioning

confidence: 99%

“…However, the approaches described above involve complex feedback circuitry to ensure the stability of the feedback network and require a giga-ohm resistor R dc to reduce the overall noise floor. Later, a low-complexity, robust, and stable feedback loop with baseline current rejection block is manifested in [9]. Its feedback network is shown in Fig.…”

Section: B Continuous Time Approach With Active Feedbackmentioning

confidence: 99%

“…Additionally, MEPR is very robust against process variations and offers high linearity. In [9], the noise generated by the feedback network is filtered out by the low-pass filter. The PMOS transistor operates in its deep sub-threshold region for a limited baseline current I dc (e.g., 4 nA, 10 nA with offchip calibrations), the only noise that will be injected to the integrator inputs is the shot noise associated with I dc .…”

Section: B Continuous Time Approach With Active Feedbackmentioning

confidence: 99%

“…Schematic of CT system with active feedback network for baseline input DC current removal. (a) CT feedback[16], (b) low noise active feedback[17], (c) semi-digital feedback[18], (d) passive LPF network[9].…”

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confidence: 99%

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Review and Analysis of CMOS Current Readout Circuits for Biosensing Applications

Awan

Wang

Quadir

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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CMOS current readout is a critical circuit block for various applications like bio-sensing. This paper presents an overview of CMOS current readout techniques and analyze their merits and demerits, including noise floor, sensitivity, and achievable system bandwidth. Mainly, the practical applicability of individual technique/design for integrated low-noise bio-sensing applications is discussed. To present a thorough insight of the state-of-the-art, most recent and relevant articles published in the literature related to the current sensing interface are summarized and compared. The paper identified the primary DC current rejection schemes, where each approach and its limitations are discussed and shown that each system comes with its limits.

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Section: B Capacitive Feedback Tiamentioning

confidence: 99%

Section: B Continuous Time Approach With Active Feedbackmentioning

confidence: 99%

Section: B Continuous Time Approach With Active Feedbackmentioning

confidence: 99%

Section: B Continuous Time Approach With Active Feedbackmentioning

confidence: 99%

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confidence: 99%

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