A 16384-bit high-density CCD memory

Rosenbaum, S.D.; Chan, C.H.; Caves, J.T.; Poon, S.; Wallace, Robert W.

doi:10.1109/jssc.1976.1050672

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B Tdfl Variable Modulus Prescaler1

Memory Technology Comparison1

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1977

1993

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Cited by 12 publications

(2 citation statements)

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“…Prescalers made in these technologies typically use cascades of modulus two dividers realized by type D or JK flip-flops. Taking advantage of the self-latching nature of TDFL gates, the TDFL prescaler described in this work uses an architecture based upon a tapped shift-register ring-a technique used in charge-coupled device circuit design [6]. This prescalar is capable of dividing by all integers from 2 to 31.…”

Section: B Tdfl Variable Modulus Prescalermentioning

confidence: 99%

Ultralow-power GaAs MESFET MSI circuits using two-phase dynamic FET logic

Lassen

Long

Nary

1993

IEEE J. Solid-State Circuits

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Section: B Tdfl Variable Modulus Prescalermentioning

confidence: 99%

Ultralow-power GaAs MESFET MSI circuits using two-phase dynamic FET logic

Lassen

Long

Nary

1993

IEEE J. Solid-State Circuits

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“…Representative high density CCD's (Rosenbaum 1976, Fairchild 1977, Texas Instruments 1977a are organized as multiple segments of serially accessed memory, each segment consisting of one series-parallel-series (SPS) array. The SPS arrays, with typically 4k bits each, offer a more efficient unit for insertion than a disc track.…”

Section: Memory Technology Comparisonmentioning

confidence: 99%

Editing requirements for data base applications and their implementation on the INDY backend kernel

Otis

Copeland

1978

Proceedings of the Fourth Workshop on Computer Architecture for Non-Numeric Processing - CAW '78

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An extrapolation of user and hardware cost trends indicate that future systems should provide more complete functionality, simplicity of use, and reliability by increasing the amount of hardware present in the system. For data base systems, this can be done by providing very high level data languages and by implementing them directly in hardware. These goals are realized with a simple hardware arrangement called INDY, which uses inexpensive memory technologies (such as charge coupled devices, magnetic bubbles, or discs). This paper first discusses the data definition and editing requirements of data languages. Then the implementation of these requirements on the INDY backend kernel is described. Finally, a comparison is made of the various memory technologies for suitability to INDY.

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