2013
DOI: 10.1109/tbcas.2013.2280694
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A 155 /spl mu/W 88-dB DR Discrete-Time /spl Delta/ /spl Sigma/ Modulator for Digital Hearing Aids Exploiting a Summing SAR ADC Quantizer

Abstract: This paper presents a low-power switched-capacitor ∆Σ modulator for digital hearing-aid applications that features a novel summing successive approximation (SAR). The summing SAR performs multi-bit quantization together with the analog addition required in feed-forward (FF) ∆Σ modulator (∆ΣM) topologies, with no attenuation of the input signals and no need for amplifiers. The prototype is implemented in a 0.18- μ m CMOS technology and its measurements demonstrate a dynamic range of 88 dB in 10 kHz bandwidth wh… Show more

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Cited by 18 publications
(8 citation statements)
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“…4. This direct path owing to the use of a SAR ADC, eliminates the requirement of an extra active circuit [13]. Bear in mind that the dummy capacitor does not participate in the input sampling since it is involved in the noise extraction process.…”
Section: Structure Of the Proposed Incremental σδ Modulatormentioning
confidence: 99%
“…4. This direct path owing to the use of a SAR ADC, eliminates the requirement of an extra active circuit [13]. Bear in mind that the dummy capacitor does not participate in the input sampling since it is involved in the noise extraction process.…”
Section: Structure Of the Proposed Incremental σδ Modulatormentioning
confidence: 99%
“…In addition, the offset mismatch among the constituent comparators in flash quantizers can degrade the resolution and linearity of the modulators. Several quantization techniques [2,3,4,5] have been proposed to deal with those disadvantages in multi-bit Sigma-Delta modulators.…”
Section: Introductionmentioning
confidence: 99%
“…Alternatively, the use of capacitive summation based on passive charge sharing is an attractive solution because of its simplicity and low-power operation, although the corresponding signal attenuation may require pre-amplification or reference scaling [3]. Other trends in hybrid multi-bit ΔΣMs [4] replace the flash quantizer by another type of Nyquist-rate ADC, like pipeline, two-step flash, cyclic, tracking, integrating or synchronous/asynchronous successive-approximation register (SAR) [5]- [7]. In many cases, the overall ADC sensitivity and robustness against circuit non-idealities (e.g.…”
Section: Introductionmentioning
confidence: 99%