2017
DOI: 10.1109/ted.2017.2763960
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A 14-nm FinFET Logic CMOS Process Compatible RRAM Flash With Excellent Immunity to Sneak Path

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Cited by 12 publications
(3 citation statements)
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“…The resistance is selected to be sufficiently larger than the LRS resistance ( ) and sufficiently smaller than the HRS resistance ( ); . This is possible because the ratio of to is several orders of magnitude in binary memristors (even if integrated with CMOS transistors 47 ). Voltage pulses are applied to the left terminal, inducing SETs in memristors serially from left to right.…”
Section: Resultsmentioning
confidence: 99%
“…The resistance is selected to be sufficiently larger than the LRS resistance ( ) and sufficiently smaller than the HRS resistance ( ); . This is possible because the ratio of to is several orders of magnitude in binary memristors (even if integrated with CMOS transistors 47 ). Voltage pulses are applied to the left terminal, inducing SETs in memristors serially from left to right.…”
Section: Resultsmentioning
confidence: 99%
“…This process can be extended to FinFET platforms with 28 nm HKMG and beyond, effectively bridging the gap between high-performance logic and embedded memory. Additionally, this work showcased the great potential of embedded RRAM technology for achieving high temperature stability [153].…”
Section: Integration Of Embedded Rrammentioning
confidence: 79%
“…Hsieh et al proposed a bipolar 14 nm node FinFET RRAM architecture and improved the ON/OFF window along with good endurance and retention performance. FinFET RRAM also reduces standby and active powers [129]. Magnetoresistive random-access memory (MRAM) is a non-volatile memory that stores data in magnetic domains.…”
Section: A Digital Circuit Interactionmentioning
confidence: 99%