A 121.4-dB DR Capacitively Coupled Chopper Class-D Audio Amplifier

Zhang, Huajun; Berkhout, Marco; Makinwa, Kofi A. A.; Fan, Qinwen

doi:10.1109/jssc.2022.3207907

Cited by 6 publications

(3 citation statements)

References 23 publications

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“…In this paper, on the basis of traditional SDM research, a third-order switching capacitor type SDM is proposed. In addition, the flicker noise and offset voltage generated by the operational amplifier can be modulated to the one, three, and five harmonics of the chopper frequency by chopper stabilization technology [3], and the thermal noise can be eliminated by thermal noise cancellation technology [4]. Finally, it can be filtered by the post filter to further improve the precision of SDM.…”

Section: Introductionmentioning

confidence: 99%

A Sigma-Delta Modulator with Single-Pole Double-Throw Analog Switch

Tao,

Duan,

2023

J. Phys.: Conf. Ser.

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In this paper, a high precision and high energy efficiency discrete-time switching capacitive 3-order Sigma-Delta modulator (SDM) is proposed. The SDM is applied to portable electroencephalograms (EEG) because of its little energy and good performance. The energy efficiency levels of the current mainstream modulator systems are analyzed and compared, and the CIFF modulator architecture which is most conducive to realizing high energy efficiency is selected. The single-loop CIFF structure is selected to give consideration to the accuracy and stability of the circuit. The circuit is implemented in a hierarchical structure, and a single-pole double-throw (SPDT) analog switch is adopted to overcome the difficulty of opening conventional CMOS analog switches at low supply voltages and the increase in threshold voltage Vth of NMOS devices due to the base bias effect. The proposed discrete-time Sigma delta ADC modulator is designed with SMIC 0.18um CMOS technology and achieves an SNDR of 101.6dB under a 1.8V power supply voltage and a signal bandwidth of 2kHz. The power consumption is 520uW and the significant bit (ENOB) is 16.58 bits.

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Section: Introductionmentioning

confidence: 99%

A Sigma-Delta Modulator with Single-Pole Double-Throw Analog Switch

Tao,

Duan,

2023

J. Phys.: Conf. Ser.

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“…Various power stage classes try to excel in one or both of these two aspects: Class-A stages offer superior linearity at the expense of efficiency; Class-B stages improve on efficiency but suffer from crossover distortion, while Class-AB topologies stay in between Class-A and Class-B in the efficiency metric. Switching output stages like Class-D and its variants, like Class-E (used mostly for RF applications [2]), feature very high power efficiency [3], [4], but lack in linearity compared to their non-switching counterparts.…”

Section: Introductionmentioning

confidence: 99%

Class–CTA: Concept and Theoretical Analysis of a High Linearity and Efficiency Power Stage Architecture

Baxevanakis,

Nikitas,

Sotiriadis

2023

IEEE Open J. Circuits Syst.

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This work presents a power stage architecture that combines high-linearity with highefficiency. The power stage is configured as a push-pull Class-A topology with two buck-converters providing its supply rails. The buck-converters continuously track the stage's output with a small constant margin, creating a minimum, constant voltage drop on the output devices; thus, the stage's efficiency is increased and its linearity is improved. Theoretical analysis of the topology and its feedback control are presented, while a design example is implemented and simulated in Cadence Spectre as proof-of-concept.

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“…By changing to a capacitive instead of a resistive feedback network and the application of choppers [12], it was shown that the performance limitations due to resistor noise in the the feedback network can be mitigated reaching a dynamic range in excess of 120 dB.…”

Section: Distortion Due To Feedbackmentioning

confidence: 99%

Active PWM ripple reduction in class-d amplifiers using digital loop filters

Lokin¹

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The research field around sound reproduction is driven by a desire to continuously pack more powerful amplifiers in a small fan-less enclosure while providing state-of-the-art noise and distortion performance. Class-D amplifiers are a perfect candidate for these requirements, specifically because of the inherently low dissipation in their switching power stage with respect to more conventional linear amplifiers. There is, however, always a caveat: switching high currents at high frequencies causes electromagnetic emissions that could interfere with the correct operation of other electronic devices. Regulations limit the amount of electromagnetic interference (EMI) that devices are allowed to emit to maintain interoperability between the many electronic devices in the Internet of things (IoT) era.Speakers are commonly connected to an amplifier using leads of several meters. These leads double as an antenna for high frequency signals above the audio band, such as the switching frequency and its harmonics or parasitic ringing in the output stage, thereby causing unwanted radiated emissions. This thesis is focused on reducing the EMI due to the residual power after the output filter at the pulse-width modulation (PWM) frequency, the so called ripple. Examples in literature reduce the power at the PWM frequency and its harmonics by applying spread spectrum modulation to smear power out over a larger bandwidth. However, in this way they still radiate the same amount of power, just not concentrated at distinct frequencies. To reduce the ripple current through the speaker leads, it is possible to use a higher order filter, use a multi-phase or multi-level output stage or to inject a cancellation signal after the output filter. In the research field of power electronics, cancellation schemes have been presented. First the disturbance is sensed and processed and afterwards a cancellation signal is synthesized and injected into the circuit. The processing can be done using a feedback or feed-forward topology, each having its advantages and disadvantages.An extensive case study on multi-phase systems is done to evaluate their merits in reducing the ripple current after the output filter. In a multiphase system, multiple half-bridges are combined in a parallel fashion to drive one or both sides of the load. Interleaving of the PWM carriers in the modulator corresponding to each half-bridge provides a reduction in the observed ripple current after combining the half bridge outputs in the output filter. The effect of adding more phases on the amount of ripple is vii ix ABSTRACT high-frequency poles.In summary, this thesis has shown a technique to reduce the ripple current after the output filter. Thereby the amount of EMI that can be radiated off the speaker leads decreases. The effect of unit delays in the loop has been mitigated by applying a special filter design method to obtain a more stable system. A prototype has been made around an existing amplifier to show the effectiveness of the proposed feedback ripple reduction so...

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A 121.4-dB DR Capacitively Coupled Chopper Class-D Audio Amplifier

Cited by 6 publications

References 23 publications

A Sigma-Delta Modulator with Single-Pole Double-Throw Analog Switch

A Sigma-Delta Modulator with Single-Pole Double-Throw Analog Switch

Class–CTA: Concept and Theoretical Analysis of a High Linearity and Efficiency Power Stage Architecture

Active PWM ripple reduction in class-d amplifiers using digital loop filters

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