A 110–170 GHz spatial power‐combined frequency tripler with 5.7%–7.8% efficiency and 0.5 W power handling

Abstract

In this article, a novel 110–170 GHz balanced tripler is presented with high‐efficiency and high‐power handling. To implement the proposed tripler, a multilayer multiplier scheme is introduced with two‐layer parallel metal fin line transitions and four planar diodes based on spatial power combining concept. Fin line transitions are used to constitute two‐layer ridge waveguides. They divide the input signal to diodes with the same amplitude and combine the third harmonic with output waveguide. The proposed tripler eliminates the dielectric loss and has good balancing characteristic, which enable the tripler to get fabulous performances such as high power handling, high‐efficiency, excellent spectral purity, and so on. The measured results shown that the tripler achieves an efficiency of 5.7%–7.8% with 147–208 mW input power and its power handling is more than 0.5W.

A W‐Band Broadband Self‐Packaged Compact SISL Tripler using FR4 substrate

“…On the other hand, many frequency multipliers on the board level have been reported in recent literature. [5][6][7][8][9][10][11] The triplers in Hrobak et al 5 and Jha et al 6 show a low minimum CL of 17 and 17.5 dB, respectively. The power capability and output power of the frequency multiplier can be improved by increasing the number of diodes, [9][10][11] but this will make it challenging to achieve wide bandwidth and high efficiency.…”

“…Moreover, it will shorten the life of the device due to thermal or reverse-breakdown effects. 10 Besides, almost all mm-wave board-level frequency multipliers need to be housed in the metal waveguide blocks, [5][6][7][8][9][10][11] which makes them costly and difficult to assemble. Developing broadband multipliers with low cost and high output power is still a challenge considering the aspects of manufacturing technology, circuit processing accuracy, simulation design method, and assembly process.…”

“…However, advanced MMIC process technology makes its cost expensive, and it needs an additional package. On the other hand, many frequency multipliers on the board level have been reported in recent literature 5–11 . The triplers in Hrobak et al 5 and Jha et al 6 show a low minimum CL of 17 and 17.5 dB, respectively.…”

“…The triplers in Hrobak et al 5 and Jha et al 6 show a low minimum CL of 17 and 17.5 dB, respectively. The power capability and output power of the frequency multiplier can be improved by increasing the number of diodes, 9–11 but this will make it challenging to achieve wide bandwidth and high efficiency. Moreover, it will shorten the life of the device due to thermal or reverse‐breakdown effects 10 .…”

“…The power capability and output power of the frequency multiplier can be improved by increasing the number of diodes, 9–11 but this will make it challenging to achieve wide bandwidth and high efficiency. Moreover, it will shorten the life of the device due to thermal or reverse‐breakdown effects 10 . Besides, almost all mm‐wave board‐level frequency multipliers need to be housed in the metal waveguide blocks, 5–11 which makes them costly and difficult to assemble.…”