1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers
DOI: 10.1109/isscc.1992.200464
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A 100 MHz data-rate, 5000-element CCD linear image sensor with reset pulse level adjustment circuit

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“…A more compact and lower-capacitance method is illustrated in Fig. 5(b), where the polysilicon gate is connected to the substrate via a buried contact [14]. To form this connection, a contact window is etched in the oxide/nitride gate insulator prior to the polysilicon deposition.…”
Section: Output-circuit Designmentioning
confidence: 99%
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“…A more compact and lower-capacitance method is illustrated in Fig. 5(b), where the polysilicon gate is connected to the substrate via a buried contact [14]. To form this connection, a contact window is etched in the oxide/nitride gate insulator prior to the polysilicon deposition.…”
Section: Output-circuit Designmentioning
confidence: 99%
“…Another method of reducing the parasitic capacitances of the floating diffusion circuit has also been described [14] and is illustrated in Fig. 6.…”
Section: Output-circuit Designmentioning
confidence: 99%