2021
DOI: 10.1002/aelm.202100543
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A 10 nm Short Channel MoS2 Transistor without the Resolution Requirement of Photolithography

Abstract: MoS2 is considered a promising candidate as a channel material for the next generation semiconductor devices owing to its atomic thickness and electrical properties. However, due to the limited resolution of the photolithography, the short channel length MoS2 transistor is still inclusive. In this work, a method to fabricate MoS2 transistors with short channel length is demonstrated, which is realized by the self‐oxidization of aluminum to form an effective isolation between the source and drain electrodes. By… Show more

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Cited by 10 publications
(12 citation statements)
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References 26 publications
(26 reference statements)
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“…Moreover, a band gap larger than 1.7 eV and relatively large effective masses mitigate the source-to-drain tunneling. 8,9 However, devices with high performances call for lowresistance ohmic contacts, which are still challenging to obtain. 10−15 Experimental results for metal−TMD contacts typically reported a large Fermi-level pinning (FLP) at the metal−TMD interfaces.…”
Section: Introductionmentioning
confidence: 99%
“…Moreover, a band gap larger than 1.7 eV and relatively large effective masses mitigate the source-to-drain tunneling. 8,9 However, devices with high performances call for lowresistance ohmic contacts, which are still challenging to obtain. 10−15 Experimental results for metal−TMD contacts typically reported a large Fermi-level pinning (FLP) at the metal−TMD interfaces.…”
Section: Introductionmentioning
confidence: 99%
“…Then, the samples were exposed to the atmosphere for 24 h to oxidize naturally and form AlO x . [11,30] After this step, the MoS 2 was physically transferred onto the ultrathin AlO x (3 nm) which wrapped the Ag electrode (Figure S1c, Supporting Information), where AlO x was used as a tunneling layer to form a direct tunneling current. Figure 1f is the energy band diagram with an ultrathin AlO x tunneling layer.…”
Section: Resultsmentioning
confidence: 99%
“…Therefore, it is necessary to optimize the contact interface between MoS 2 and metal electrode for improving the performance of MOSFET. Scientific workers have done a large number of research to reduce Rc, [5,[11][12][13][14][15][16][17][18][19][20] where these most effective and representative methods are inserting h-BN tunneling layer and physically transferring metal electrodes. [18,21] But there are still some problems that when previous works transferred metal electrodes to 2D semiconductors, the different metal electrodes have different adhesion to the silicon wafer, making it difficult to strip off the metal electrodes.…”
Section: Introductionmentioning
confidence: 99%
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“…[37] MoS 2 transistors at the ultimate scale also demonstrate non-negligible drain-induced barrier-lowering (DIBL) [35] and a degradation in the subthreshold swing (SS). [37,38] This can be attributed to the lack of control over the planar structure in the form of a top gate or a back gate, as shown in Figure 2a,b. A small SS value enables a low operation voltage and a small amount of subthreshold leakage current, and a poor DIBL degrades the voltage gain of the FET.…”
Section: Scaling Down Toward Ultrascaled Sizementioning
confidence: 99%