1999
DOI: 10.1109/4.808917
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A 10-Gb/s (1.25 Gb/s×8)4×2 0.25-μm CMOS/SIMOX ATM switch based on scalable distributed arbitration

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Cited by 20 publications
(4 citation statements)
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“…Combined input-crosspoint buffered packet switches are an alternative to input-buffered switches to relax arbitration timing and to provide high-performance switching for packet switches with high-speed ports [1], [2]. These switches use time efficiently as input and output port selections are independent.…”
Section: Introductionmentioning
confidence: 99%
“…Combined input-crosspoint buffered packet switches are an alternative to input-buffered switches to relax arbitration timing and to provide high-performance switching for packet switches with high-speed ports [1], [2]. These switches use time efficiently as input and output port selections are independent.…”
Section: Introductionmentioning
confidence: 99%
“…An example of the single-stage switch architectures is a crossbar switch. There are many studies on developing crossbar-based high-speed switches [1], [3], [4], [5], [6]. Although this crossbar-based approach is effective up to a certain switch size, the number of the switching elements is proportional to the square of the number of switch ports.…”
Section: Introductionmentioning
confidence: 99%
“…There are various types of buffering strategies in switch architectures: input buffering, output buffering, or crosspoint buffering [8], [9], [13]. Input buffering is a cost-effective approach for high-speed switches.…”
Section: Introductionmentioning
confidence: 99%