A 1.94mm², 38.17mW dual VP8/H.264 Full-HD encoder/decoder LSI for Social Network Services (SNS) over smart-phones

Abstract

A first dual-standard video encoder and decoder LSI providing VP8 (i.e. video format of WebM project for use of web's video) or H.264/AVC video recording and playback simultaneously is implemented with 28nm CMOS and occupies 1.94mm 2 of core area. Several area-efficient techniques are realized, leading to 43.6% of area reduction. A new rate control is designed to facilitate the adaptation of video data and frame rates for network services. Two fast algorithms and new bool encoder/decoder are proposed to enhance power efficiency. This chip consumes 28.15mW and 10.02mW of VP8 encoder and decoder average power for 1080p@30fps at 0.9V, respectively.

Stochastic learning of multi-instance dictionary for earth mover’s distance-based histogram comparison

“…We further combine the first and second lines of (17) to one single equation of matrices as follows,…”

“…An another example is the audio single date. In the problem of audio single processing problem, a sequence of audio single is usually split into a set of short frames, and each frame is regard as a instance, while the sequence itself is treated as a bag of instances [28,6,2,3,17]. We investigate the problem of retrieving multi-instance bags from a database.…”