A 1.2v 11b 100Msps 15mW ADC realized using 2.5b pipelined stage followed by time interleaved SAR in 65nm digital CMOS process

Singh, Priyanka; Kumar, Anand; Debnath, Chandrajit; Malik, Rakesh

doi:10.1109/cicc.2008.4672082

Cited by 5 publications

(2 citation statements)

References 6 publications

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“…Many realizations of ADC are based on a switched capacitor technique [1][2][3] which uses mainly operational amplifiers, not easy to implement in up-to-date CMOS technologies. Such voltage mode elements are often energy-expensive, [4], although they are used as components for example in SAR ADCs [5][6][7]. Hence, current mode circuits can be useful in analog to digital converters [8][9][10].…”

Section: Introductionmentioning

confidence: 99%

ADC based on a fully differential current mode integrator

Handkiewicz¹,

Kropidłowski

Szczęsny

et al. 2019

Analog Integr Circ Sig Process

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The paper presents current mode Analog to Digital Converters (ADC) for a standard digital CMOS technology in a nm scale. It is shown that such converters composed of a fully differential current mode integrator make it possible to achieve a several-bit resolution necessary for pipeline processing. The proposed fully differential structure provides a 1-bit higher resolution in comparison to a non-balanced structure. The goal of the paper is obtained without voltage increasing above the standard 1.2 V supply. The pipelined ADC, composed of two 5-bits converters, consumes 1.5 mW of power and its Walden figure-of-merit equals 104.34 fJ/conv.

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Section: Introductionmentioning

confidence: 99%

ADC based on a fully differential current mode integrator

Handkiewicz¹,

Kropidłowski

Szczęsny

et al. 2019

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

show abstract

“…Singh et al [16][17][18] have presented a technique of connecting cross-coupled capacitors across the auxiliary amplifier to obtain better settling behaviour of high-gain, high-speed gain-boosted OTAs. They have demonstrated an application of this technique in 10 bit pipeline and time interleaved successive approximation register (SAR) analogue-to-digital converters in 65 nm technology node [17,18]. However, the theory and mathematics behind the successful operation of this technique have not been reported.…”

Section: Introductionmentioning

confidence: 99%

Systematic design approach for a gain boosted telescopic OTA with cross‐coupled capacitor

Joshi

Shrimali

Sharma

2017

IET Circuits, Devices & Systems

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A symbolic analysis is presented to study a gain-boosted telescopic operational transconductance amplifier (OTA) with cross-coupled capacitor (positive feedback) across an auxiliary op-amp. The effects of positive feedback capacitor (PFC) on the pole-zero doublet introduced by the auxiliary op-amp are explored using analytical techniques and simulations. A complete transfer function of the OTA with PFC across the auxiliary op-amp is derived and verified through circuit simulations. The results obtained from circuit simulation and modelled transfer function show good agreement with each other. Furthermore, the analytical expressions for the feedback capacitor in terms of pole-zero locations, unity gain bandwidth (UGBW) and phase margin (PM) are presented. It is shown that UGBW, PM and settling behaviour of the OTA can be tuned by the PFC. A systematic design approach to improve the PM and settling behaviour is discussed. On the basis of the theory presented, 17% improvement in 0.01% settling time is demonstrated.

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A design of 10-bit, 10 MS/s Pipelined ADC with Time-interleaved SAR

Jang

Hayder

et al. 2017

Microelectronics Journal

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A 1.2v 11b 100Msps 15mW ADC realized using 2.5b pipelined stage followed by time interleaved SAR in 65nm digital CMOS process

Cited by 5 publications

References 6 publications

ADC based on a fully differential current mode integrator

ADC based on a fully differential current mode integrator

Systematic design approach for a gain boosted telescopic OTA with cross‐coupled capacitor

A design of 10-bit, 10 MS/s Pipelined ADC with Time-interleaved SAR

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