A 1.2-µW 41-dB Ripple Attenuation Chopper Amplifier Using Auto-Zero Offset Cancelation Loop for Area-Efficient Biopotential Sensing

Abstract

In this paper, a low-power and low-noise capacitive-coupled chopper instrumentation amplifier (CCIA) is proposed for biopotential sensing applications. A chopping technique is applied to mitigate the domination of flicker noise at low frequency. A new offset cancellation loop is also used to deal with the intrinsic offset, originating from process variation, to reduce ripple noise at the output of CCIA. Moreover, the optimization of the chip area was resolved by adding a T-network capacitor in the negative feedback loop. The CCIA is designed on 0.18 µm process CMOS technology with a total chip area of 0.09 mm2. The post-simulation results show that the proposed architecture can attenuate the output ripple up to 41 dB with a closed-loop gain of 40 dB and up to 800 Hz of bandwidth. The integrated input referred noise (IRN) of the CCIA is 1.8 µVrms over a bandwidth of 200 Hz. A noise efficiency factor (NEF) of 5.4 is obtained with a total power dissipation of 1.2 µW and a supply voltage of 1 V, corresponding to a power efficiency factor of 9.7 that is comparable with that of state-of-the-art studies.

A Tunable Gain and Bandwidth Low-Noise Amplifier with 1.44 NEF for EMG and EOG Biopotential Signal

“…Another development carried out on the capacitive feedback loop was the introduction of reset switches to initialize or reset the input and output standard mode voltages before the amplifier starts or when it is saturated [16,17]. An improvement over the conventional capacitive feedback is the T-network capacitive structure [4,18]. It has the advantage of reducing the sensitivity to mismatch and process variations by using larger capacitors with a small equivalent capacitance so that the input capacitor may be smaller.…”

“…However, its implementation has drawbacks since the choppers produce ripple and present limited input impedance, which must be mitigated with additional circuitry. The most common way to increase the input impedance is by using an impedance boosting loop [9] or a positive feedback loop [12,18]. An innovative form was developed in [20], which uses an input sampling input stage and digital-analog hybrid dc servo loop.…”

Design a low power, 100dB operational amplifier using CMOS technology

“…Today's system-on-chip (SOC) applications required the integration of both analog and digital components to address non-functional constraints [1][2][3][4][5][6][7][8]. The best-picked topology can aid with the appropriate design of analog and digital circuits.…”

Single-Stage CMOS Operational Transconductance Amplifiers (OTAs): A Design Tutorial

“…OTA-based integrators with an inherent high gain and low-pass frequency response have been used in delta-sigma analog-to-digital converters (ADCs) [10][11][12]. Moreover, OTAs themselves have served as feedforward amplifiers of closed-loop systems such as capacitively coupled instrumentation amplifiers (CCIAs) [13][14][15] and power ICs [16][17][18][19][20] thanks to their high gain performance. The versatility and wide applicability of OTAs make them indispensable in various analog and mixed-signal circuit designs, emphasizing the paramount importance of OTA design.…”