A 1.2-V 2.18-ppm/°C curvature-compensated CMOS bandgap reference

Zhang, Yuxin; Li, Jinghu; Wang, Xinsheng; Luo, Zhicong; Zhou, Yanfei

doi:10.1587/elex.18.20210162

Cited by 8 publications

(2 citation statements)

References 32 publications

(36 reference statements)

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“…Besides, the VR also needs to produce a stable voltage against process, supply voltage, and temperature (PVT) variations. Compared to the bandgap voltage reference (BGR) using BJTs and large resistors [1,2,3,4,5,6,7,8], the sub-threshold CMOS VRs (CVRs) are attractive alternatives for both low-voltage and low-power operation with less chip areas [9,10,11,12,13,14,15,16,17,18].…”

Section: Introductionmentioning

confidence: 99%

A 353pW, 0.014%/V line sensitivity self-biased CMOS voltage reference with source degeneration active load

Yu,

Zhang,

2024

IEICE Electron. Express

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This paper proposes a self-biased sub-threshold CMOS voltage reference for ultra-low-power application. In the current generation path, a source degeneration active load (SDAL) is added to reduce the variation of the reference current (IR) which helps to produce a stable voltage reference (VREF). Moreover, by utilizing the line sensitivity (LS) improving circuit, the dependence of VREF on the supply voltage (VDD) can be largely reduced. The proposed design is fabricated in a standard 0.18-µm CMOS process. 11-chip measurement results show the prototype design can provide an 147.1 mV average voltage with a minimum power consumption of 353 pW at 27 ℃. The line sensitivity (LS) is only 0.014%/V, while the power supply rejection ratio (PSRR) at 10 Hz is -68 dB. The average temperature coefficient (TC) is 72 ppm/°C from -20 °C to +80 °C, and the die area is only 0.0019 mm 2 .

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Section: Introductionmentioning

confidence: 99%

A 353pW, 0.014%/V line sensitivity self-biased CMOS voltage reference with source degeneration active load

Yu,

Zhang,

2024

IEICE Electron. Express

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“…This BGR is extensively used due to its sub-1V operation [9]. Many compensation techniques have been proposed for this current mode BGR to achieve better performance in TC [10,11,12,13,14,15]. However, the drawback of this approach is the tradeoff between area and power.…”

Section: Introductionmentioning

confidence: 99%

A CMOS bandgap reference based on switched capacitor with temperature compensation method

Ran

Chen

Wang

et al. 2022

IEICE Electron. Express

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A CMOS bandgap reference based on switched capacitor is proposed in this paper. Temperature compensation is adopted to achieve better temperature coefficient (TC). Two first order compensated reference voltages are combined to realize a new reference voltage with lower TC. Due to the switched capacitor operation, power and area of circuit are reduced. Simulation result shows that the bandgap reference achieves TC of 14.5 ppm/ • C from −40 • C to 120 • C. Bandgap reference output voltage is 235 mV with a ripple voltage of 700 µV.

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