A 1.2-V 180-nm CMOS Low-Power Multi-Band Ring Oscillator based Frequency Synthesizer for Edge-Combining Transmitters

Stadelmayer, Markus; Schumacher, Tim; Faseth, Thomas; Pretl, Harald

doi:10.1109/newcas49341.2020.9159846

Cited by 6 publications

(2 citation statements)

References 7 publications

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“…Ring oscillators are mainly formed through a feedback connection over an odd number of successive delay stages (current starved INVERTERs (CSIs) [5,6], output split INVERT-ERs (OSIs) [3], or NANDs [2]). The oscillation frequency of ring oscillators is given by (f osc = 1/2nτ), where n is an odd number representing the number of delay stages and τ is the gate delay time of those delay cells.…”

Section: Injection Lockingmentioning

confidence: 99%

A High FoM and Low Phase Noise Edge-Injection-Based Ring Oscillator in 350 nm CMOS for Sub-GHz ADPLL Applications

Yousef,

Alzahmi

2023

Electronics

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This paper presents an injection locked digitally controlled ring oscillator (IL-DCRO). To reduce jitter variations, minimize oscillator spurious signals, and eliminate periodical phase error, a double edge-injection (window injection) scheme with synchronized edge directions is proposed. A combinational edge generator is utilized to substitute the sequential edge generators for injection timing requirements relaxation. By biasing devices in deep triode, digitally controlled delay cells currents are adopted for frequency tuning. This helps reducing the devices flicker (1/f) noise and minimize the DCRO overall phase noise. At 1 MHz offset of frequency, the proposed oscillator has a measured phase noise of −125.95 dBc/Hz and −115.6 dBc/Hz at oscillation frequencies of 913.4 MHz and 432.6 MHz, respectively. Fabricated in 350 nm CMOS process, with a maximum power consumption of 3.3 mW, and oscillating at 913.4 MHz, this DCRO achieves a tuned oscillator figure of merit (FoM) of −197.35 dBc/Hz. The core area of this edge-injection-based DRCO is only 0.08 mm2.

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Section: Injection Lockingmentioning

confidence: 99%

A High FoM and Low Phase Noise Edge-Injection-Based Ring Oscillator in 350 nm CMOS for Sub-GHz ADPLL Applications

Yousef,

Alzahmi

2023

Electronics

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“…This modification is performed to enhance the frequency response and enable the VCO to achieve higher oscillation frequencies when implementing a ring oscillator structure. Stadelmayer et al [ 32 ] presented a comprehensive study on a broadband low-power synthesizer. The synthesizer is based on an eight-stage differential ring oscillator (RO) regulated by a Phase-Locked Loop (PLL).…”

Section: Introductionmentioning

confidence: 99%

Integrated Circuit of a Chua’s System Based on the Integral-Differential Nonlinear Resistance with Multi-Path Voltage-Controlled Oscillator

Duan,

Li,

et al. 2024

Micromachines

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In this paper, we present a fully integrated circuit without inductance implementing Chua’s chaotic system. The circuit described in this study utilizes the SMIC 180 nm CMOS process and incorporates a multi-path voltage-controlled oscillator (VCO). The integral-differential nonlinear resistance is utilized as a variable impedance component in the circuit, constructed using discrete devices from a microelectronics standpoint. Meanwhile, the utilization of a multi-path voltage-controlled oscillator ensures the provision of an adequate oscillation frequency and a stable waveform for the chaotic circuit. The analysis focuses on the intricate and dynamic behaviors exhibited by the chaotic microelectronic circuit. The experimental findings indicate that the oscillation frequency of the VCO can be adjusted within a range of 198 MHz to 320 MHz by manipulating the applied voltage from 0 V to 1.8 V. The circuit operates within a 1.8 V environment, and exhibits power consumption, gain–bandwidth product (GBW), area, and Lyapunov exponent values of 1.0782 mW, 4.43 GHz, 0.0165 mm2, and 0.6435∼1.0012, respectively. The aforementioned circuit design demonstrates the ability to generate chaotic behavior while also possessing the benefits of low power consumption, high frequency, and a compact size.

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Edge-Combining for QPSK and FSK Modulation Using a Single Delay-Line

Stadelmayer

Schumacher

Faseth

et al. 2020

2020 Austrochip Workshop on Microelectronics (Austrochip)

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A 1.2-V 180-nm CMOS Low-Power Multi-Band Ring Oscillator based Frequency Synthesizer for Edge-Combining Transmitters

Cited by 6 publications

References 7 publications

A High FoM and Low Phase Noise Edge-Injection-Based Ring Oscillator in 350 nm CMOS for Sub-GHz ADPLL Applications

A High FoM and Low Phase Noise Edge-Injection-Based Ring Oscillator in 350 nm CMOS for Sub-GHz ADPLL Applications

Integrated Circuit of a Chua’s System Based on the Integral-Differential Nonlinear Resistance with Multi-Path Voltage-Controlled Oscillator

Edge-Combining for QPSK and FSK Modulation Using a Single Delay-Line

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