A 1.2-V 108.9-dB A-Weighted DR 101.4-dB SNDR Audio $\Sigma\Delta$  ADC Using a Multi-Rate Noise-Shaping Quantizer

Cho, Jun Soo; Rhee, Changyong; Kim, Susie; Yang, Youngtae; Jun, Jae-Hoon; Lee, Hyunjoong

doi:10.1109/tcsii.2018.2853189

Cited by 4 publications

(1 citation statement)

References 13 publications

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“…However, its gain factor in pass band is close to 20 dB which results in a smaller input range and poorer stability of the modulator. Therefore, this paper adopts a 5-bit quantizer to reduce quantization noise, and the finer quantization step reduces the voltage and current variations at each time-step [12]. So, the amplifier in modulator requires less energy to respond to signal changes, which can improve the modulator's stability and energy efficiency.…”

Section: Modulator Architecturementioning

confidence: 99%

A 516 μW, 121.2 dB-SNDR, and 125.1 dB-DR Discrete-Time Sigma-Delta Modulator with a 20 kHz BW

Kong

2022

Journal of Sensors

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This article proposed a discrete-time single-loop 3rd order 5-bit Sigma-Delta (ΣΔ) modulator for the audio applications. In this modulator, a feed forward path is used to relax the design requirement of amplifier, which can reduce integrator’s output swing. And a 5-bit asynchronous SAR ADC combined with analog summing is adopted to quantify the summation of feedforward signal and loop filter output, which can significantly reduce power consumption. In addition, chopper stabilization technique is used to alleviate the flicker noise introduced by the first integrator. To eliminate the nonlinearity introduced by multibit quantizer, an improved data weighted average algorithm calibration circuit is proposed. The proposed modulator is implemented in 130 nm technology with a 1.12 mm2 core area. Operating at a 2.56MS/s sampling rate, post layout simulation results show that the modulator realizes 121.2-dB SNDR and 125.1-dB DR in a 20 kHz signal bandwidth, it dissipating 516 μW from 1.5 V supply. It also achieves the energy efficiency, as demonstrated by a Schreier figure of merit (FoMS) of 197 dB.

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Section: Modulator Architecturementioning

confidence: 99%

A 516 μW, 121.2 dB-SNDR, and 125.1 dB-DR Discrete-Time Sigma-Delta Modulator with a 20 kHz BW

Kong

2022

Journal of Sensors

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A new17-bit 105.5-dB dynamic range 2-1 cascaded SAR-based ΔΣ modulator using single-bit DAC for audio applications

Reyhani-Shahrestani

Reyhani

2020

AEU - International Journal of Electronics and Communications

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An Adjustable Window-Based FIR Filter and Its Application in Audio Signal De-Noising

Hossin

Shil

et al. 2018

2018 3rd International Conference on Robotics and Automation Engineering (ICRAE)

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A 1.2-V 108.9-dB A-Weighted DR 101.4-dB SNDR Audio $\Sigma\Delta$ ADC Using a Multi-Rate Noise-Shaping Quantizer

Cited by 4 publications

References 13 publications

A 516 μW, 121.2 dB-SNDR, and 125.1 dB-DR Discrete-Time Sigma-Delta Modulator with a 20 kHz BW

A 516 μW, 121.2 dB-SNDR, and 125.1 dB-DR Discrete-Time Sigma-Delta Modulator with a 20 kHz BW

A new17-bit 105.5-dB dynamic range 2-1 cascaded SAR-based ΔΣ modulator using single-bit DAC for audio applications

An Adjustable Window-Based FIR Filter and Its Application in Audio Signal De-Noising

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