A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation

Narasimman, Neelakantan; Nag, Dipankar; Chuan, Kevin Chai Tshun; Kim, Tony T.

doi:10.1109/cicc.2017.7993661

Cited by 15 publications

(3 citation statements)

References 3 publications

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“…Table-I compares the proposed CDC design with several state-of-the art ones. Even though the ΔΣ modulation-based design proposed in [1][2] [4] can reach relatively high resolution, their measure time is long. Design in [7] used time-domain signal processing method to measure capacitance but its absolute resolution is greater than 10fF , the proposed CDC achieves a resolution of 0.55fF under 10pF parasitic capacitance with an energy efficiency of 0.56pJ/conversion-step, and conversion time of less than 8us.…”

Section: Discussionmentioning

confidence: 99%

A PVT-Insensitive Capacitance-to-Digital Converter Using Ring-Based Time-Domain Quantizer

Zeng

Chen³

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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In this paper, we proposed a Ring Time-to-Digital Converter (RTDC)-based Capacitance-to-Digital Converter (CDC) that is insensitive to PVT variation. The proposed CDC embeds a Capacitance-to-Time Converter (C2T) with high linearity, leveraging a parasitic elimination technique to counteract environment changes. Thanks to the ring structure of RTDC, the presented CDC has theoretically infinite detection range. However, RTDC suffers from the process, voltage and temperature (PVT) variation, compromising its dynamic range . This paper proposed a new architecture that matches the current sources of the front-end and delay cells in the RTDC. Therefore, the front-end and RTDC have the same PVT response, leading to an inherent-PVT-stabilized feature. The proposed CDC was implemented in a 40-nm LP CMOS process. Simulation results show that it achieves 0.55fF resolution under 10pF parasitic capacitance and it covers 3.75-64pF capacitance detection range, with a 0.56pJ/conversion-step figure of merit and a maximum 20us conversion time.

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Section: Discussionmentioning

confidence: 99%

A PVT-Insensitive Capacitance-to-Digital Converter Using Ring-Based Time-Domain Quantizer

Zeng

Chen³

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…Apart from the C-T conversion technique, the C-V technique converts capacitance into analog voltages and then analog-to-digital converters (ADCs) convert the analog voltage into a digital signal [10][11][12][13][14][15]. However, the inclusion of an ADC increases the area and the power consumption of the entire system, which is a disadvantage of this approach despite intuitive operating principles.…”

Section: Introductionmentioning

confidence: 99%

“…However, the inclusion of an ADC increases the area and the power consumption of the entire system, which is a disadvantage of this approach despite intuitive operating principles. Other types of C-V conversion-based CDCs achieve high resolution using a delta-sigma modulator (DSM) [13][14][15]. However, the energy efficiency of DSM-based CDCs is limited due to the power-consuming OTA.…”

Section: Introductionmentioning

confidence: 99%

Noise Immunity-Enhanced Capacitance Readout Circuit for Human Interaction Detection in Human Body Communication Systems

et al. 2022

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Recent healthcare systems based on human body communication (HBC) require human interaction sensors. Due to the conductive properties of the human body, capacitive sensors are most widely known and are applied to many electronic gadgets for communication. Capacitance fluctuations due to the fact of human interaction are typically converted to voltage levels using some analog circuits, and then analog-to-digital converters (ADCs) are used to convert analog voltages into digital codes for further processing. However, signals detected by human touch naturally contain large noise, and an active analog filter that consumes a lot of power is required. In addition, the inclusion of ADCs causes the system to use a large area and amount of power. The proposed structure adopts a digital-based moving average filter (MAF) that can effectively operate as a low-pass filter (LPF) instead of a large-area and high-power consumption analog filter. In addition, the proposed ∆C detection algorithm can distinguish between human interaction and object interaction. As a result, two individual digital signals of touch/release and movement can be generated, and the type and strength of the touch can be effectively expressed without the help of an ADC. The prototype chip of the proposed capacitive sensing circuit was fabricated with commercial 65 nm CMOS process technology, and its functionality was fully verified through testing and measurement. The prototype core occupies an active area of 0.0067 mm2, consumes 7.5 uW of power, and has a conversion time of 105 ms.

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A 0.033-mm² 21.5-aF Resolution Continuous-Time Delta-Sigma Capacitance-to-Digital Converter with Parasitic Capacitance Immunity up to 480pF

Lee

et al. 2021

2021 IEEE Asian Solid-State Circuits Conference (A-Sscc)

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A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation

Cited by 15 publications

References 3 publications

A PVT-Insensitive Capacitance-to-Digital Converter Using Ring-Based Time-Domain Quantizer

A PVT-Insensitive Capacitance-to-Digital Converter Using Ring-Based Time-Domain Quantizer

Noise Immunity-Enhanced Capacitance Readout Circuit for Human Interaction Detection in Human Body Communication Systems

A 0.033-mm² 21.5-aF Resolution Continuous-Time Delta-Sigma Capacitance-to-Digital Converter with Parasitic Capacitance Immunity up to 480pF

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A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation

Cited by 15 publications

References 3 publications

A PVT-Insensitive Capacitance-to-Digital Converter Using Ring-Based Time-Domain Quantizer

A PVT-Insensitive Capacitance-to-Digital Converter Using Ring-Based Time-Domain Quantizer

Noise Immunity-Enhanced Capacitance Readout Circuit for Human Interaction Detection in Human Body Communication Systems

A 0.033-mm2 21.5-aF Resolution Continuous-Time Delta-Sigma Capacitance-to-Digital Converter with Parasitic Capacitance Immunity up to 480pF

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Product

Resources

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A 0.033-mm² 21.5-aF Resolution Continuous-Time Delta-Sigma Capacitance-to-Digital Converter with Parasitic Capacitance Immunity up to 480pF