A 0.6‐V sub‐mW X‐band RFSOI CMOS LNA with novel complementary current‐reused technique

SummaryOver the past few years, with lower power consumption, reasonable layout area, and the ease of integration with standard circuit design technologies compared to the other counterparts, delay stage ring voltage‐controlled oscillators (VCOs) have been in the limelight of microelectronics scientists. However, few efforts have focused on representing high‐performance delay stage ring VCOs in the deep nanometric regime. In this regard, by virtue of outstanding electrical properties of carbon nanotube wrap‐gate transistors, this work aims to propose a carbon nanotube field‐effect transistor (CNTFET)–based delay stage ring VCO. After performing rigorous simulations, the proposed ring VCO which has been designed by 10‐nm gate‐all‐around (GAA) CNTFET technology shows suitable electrical performance metrics. The simulation results demonstrate that the proposed GAA‐CNTFET‐based ring VCO consumes 85.176 μW at with a 6.12‐ to 10.42‐GHz frequency tuning range. At the worst‐case noise conditions, the proposed design presents ‐90.747 dBc/Hz phase noise at 1 MHz offset frequency. With occupying 1.414 μm2 physical area, the proposed VCO is appropriate for the ultracompact nanoscale radio frequency apparatus. Our simulation results accentuate that with further improvements and commercializing the fabrication techniques for CNTFET transistors, the proposed GAA‐CNTFET‐based VCO can be considered as a potential candidate for X‐band satellite communication applications.

Section: X-band Satellite Communicationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A low‐power delay stage ring VCO based on wrap‐gate CNTFET technology for X‐band satellite communication applications

Jooq

Bozorgmehr

Mirzakuchaki

2020

“…Classic strategies for reducing the overall power consumption include current reuse 7,8 and body bias techniques. [9][10][11] Moreover, there exist different methods in the literature for reducing the circuit area, such as the non-use of on-chip inductor in the LNA structure. 12,13 It should be noted that although the on-chip inductor is a good passive device, it is difficult to be realized as large inductance values because of occupying substantial active area and having a lower quality factor than required for most applications.…”

Section: Introductionmentioning

confidence: 99%

A 0.3–5 GHz, low‐power, area‐efficient, high dynamic range variable gain low‐noise amplifier based on tunable active floating inductor technique

Soleymani

Amiri

Maghami

2021

An area-efficient low-noise amplifier with extensive voltage gain variation in the frequency range of 0.3 to 5 GHz is proposed. The designed amplifier comprises of two stages of inverter cells, where by utilizing a resistance shunt feedback, the first stage makes the appropriate voltage gain and input impedance matching, and the second stage increases the bandwidth of the circuit utilizing an active floating inductor. Self-forward-body-bias structure is employed in the presented work for reducing power consumption and improving the overall circuit performance. High voltage gain, low power consumption, wide frequency range of operation, lack of physical inductor, and consequently small occupied active area are among the most important features of the proposed circuit. The presented amplifier has been designed and simulated in standard 90-nm and 0.18-μm technologies with 0.9-and 1.2-V supply voltages, respectively, in which important specifications are reported for 90-nm complementary metal-oxide semiconductor (CMOS) process in details. Power consumption of the designed amplifier is 8.8 mW in 90-nm technology with a flat variable voltage gain of À22 to 21.2 dB. The circuit consumes silicon area of 122 Â 112 μm 2 , and in the high-gain mode, the simulated S 11 parameter is less than À10 dB, noise figure is almost 3.2 dB, and the IIP3 is equal to À4 dBm.

“…Although Solid-State Power Amplifiers (SSPAs) have grown in popularity in recent years, TWTs are commonly used as final stage power amplifiers for communication satellites, radars, electronic warfare systems. [1][2][3][4][5][6][7][8][9][10][11][12][13] Typical TWTs consist five main sections, namely, electron gun, SWS, input/output coupler(s), focusing structure, and collector. The electron gun block generates and forms an electron beam which acts as input of the SWS for beam-wave interaction.…”

Section: Introductionmentioning

confidence: 99%

Detection of band edge frequencies in symmetric/asymmetric dielectric loaded helix slow‐wave structures

Ertay

Simsek

2021

The significant contribution of this paper is to present a comprehensive analysis and design of π-point and band edge frequencies of reported helix SWSs including not only a microwave but also millimeter-wave operation frequencies considering the methods in available literature which are the Coupled Mode Analysis (CMA), the Exact Floquet Approach (EFA), and the Auxiliary Functions of Generalized Scattering Matrix (AFGSM) as a comparative study. A different approach called as effective rod model is applied to circular/ T-shaped dielectric support rod helix SWSs in order to obtain ladder circuit representation of one turn of related helix SWSs for the first time. Scattering matrices of equivalent circuit representation of interested helix SWSs are obtained by using microstrip line model of helix SWS which slits helical tape at the effective helix radius along the direction normal to the helix winding direction and flattens it out for the EFA, the AFGSM, and the CMA methods. Additionally, comparisons are given for investigated methods together with the results of Computer Simulation Technology (CST) design environment, and good agreement has been observed among numerical results of different helix SWSs in a broad frequency range.