A 0.25μm CMOS based 70V smart power technology with deep trench for high-voltage isolation

Next generation of Deep Trench Isolation for Smart Power technologies with 120V high-voltage devices

“…As a consequence, an incessant DTI development has been carried out during the last decade giving for a widespread of possibilities. The most of the reported DTI cross-sections [3][4][5][6][7][8][9][10][11] match with one of the (a)-(d) structures in Fig. 1.…”

“…In order to provide different resistivity regions like in structures (c) and (d) in Fig. 1, there exist two techniques: a high-dose implant through the trench [7,9,11] or a multiepitaxial substrate [4][5][6]8].…”

“…In the former case, the Polysilicon is highly doped and contacted to the bulk substrate by removing the oxide at the trench bottom. (c) A high resistive substrate [3,10] or a combination of high (top) with low (bottom) resistive regions in the substrate [4][5][6][7][8][9]11]. In order to provide different resistivity regions like in structures (c) and (d) in Fig.…”

“…(a) A deep trench filled with TEOS [3,10,11] or with TEOS and Polysilicon [4][5][6][7][8][9]. The latter is beneficial to avoid mechanical stress.…”

A new compact model for external latchup

“…Test structures were fabricated in two different technologies: 0.18-lm RF-CMOS and 0.25-lm SmartMOS [7]. A substrate diode was used as the substrate current injector.…”