A 0.016 mm2 12 b $\Delta \Sigma $ SAR With 14 fJ/conv. for Ultra Low Power Biosensor Arrays

Abstract

The instrumentation systems for implantable brainmachine interfaces represent one of the most demanding applications for ultra low-power analogue-to-digital-converters (ADC) to date. To address this challenge, this paper proposes a SAR topology for very large sensor arrays that allows an exceptional reduction in silicon footprint by using a continuous time 0-2 MASH topology. This configuration uses a specialized FIR window to decimate the modulator output and reject mismatch errors from the SAR quantizer, which mitigates the overhead from dynamic element matching techniques commonly used to achieve high precision. A fully differential prototype was fabricated using 0.18 μm CMOS to demonstrate 10.8 ENOB precision with a 0.016 mm 2 silicon footprint. Moreover, a 14 fJ/conv figure-of-merit can be achieved, while resolving signals with the maximum input amplitude of ±1.2 Vpp sampled at 200 kS/s. The ADC topology exhibits a number of promising characteristics for both high speed and ultra low-power systems due to the reduced complexity, switching noise, sampling load, and oversampling ratio, which are critical parameters for many sensor applications. Index Terms-A/D conversion, bio-sensors arrays, oversampling, incremental delta-sigma, FIR decimation, low power analogue, ADC calibration. I. INTRODUCTION T HE emergent market for wearable electronics and implantable devices for personalized health care has resulted in a growing demand for miniaturized battery powered systems that wirelessly connect a network of sensors [1]. These systems rely extensively on high precision analogue to digital conversion to leverage digital processing techniques and accommodate stringent diagnostic requirements [2]. As a result the ADC power, area, and precision can have a profound impact on a system's overall capabilities. For this reason oversampling techniques using ADCs have already been used extensively to accommodate the niche characteristics of biomedical devices and acquire low frequency bio-signals [3]. More recent developments allow these techniques to be more applicable to large sensor arrays using an incremental analogue to digital converter (IADC) topology [4]. This is in contrast to the conventional use where a single oversampling ADC continuously converts the signal from a single sensing unit with exceptional efficiency. IADC designs are unique in Manuscript

A 3rd Order Time Domain Delta Sigma Modulator with Extended-Phase Detection

“…The PWM encoded signals Φ 1-15 are used to compute the remaining binary least-significant codes for Q 4-1 seen at the ADC output. The unary weighting averages out any mismatch components and will also assist in performing foreground calibration of binary weighted DAC by correlating the output derivative code transitions in Q 9-5 [15].…”

A Low-Power High-Speed Dynamic Comparator With a Transconductance-Enhanced Latching Stage

“…The latch-based dynamic comparator is a crucial module in analog-to-digital converters (ADC) [1]- [3], high-speed digital I/O circuits [4], memory sensing amplifiers [5] and analog built-in-self-testing (BIST) circuits [6]. Compared with static comparators, dynamic comparators utilize positive feedback and dynamic bias; therefore, have higher speed and lower static power consumption [7].…”

A 103 dB DR Fourth-Order Delta-Sigma Modulator for Sensor Applications

“…The biomedical market is expanding rapidly in response to the increasing interest in human healthcare. Wireless biomedical sensing systems require a low-power wireless transmitter and a high-resolution analog-to-digital converter (ADC) [1,2]. A delta-sigma modulator (DSM) architecture is more appropriate for biomedical sensing applications than many other ADCs because it can achieve a high resolution in low-frequency domains [1][2][3].…”