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Hedayat, Christian; Hachem, A.; Leduc, Yves; Benbassat, Gérard

doi:10.1023/a:1008326315191

Cited by 33 publications

(5 citation statements)

References 5 publications

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“…According to (5) we can define a function named volt_comp() whose input parameters contain v t0 t , v t0 cp , v t0 cs , i cp , Δt, and its outputs v t , v cp and v cs at t = t 0 + Δt can be calculated.…”

Section: Lf Modelmentioning

confidence: 99%

“…However, (11) reveals that this equation is a transcendental equation having no analytical solution. Using Newton iterated method can implement a numerical solving procedure 5 . According to this algorithm, a function named tdiv_comp () can compute the next rising edge of divider output t n+1 from t n .…”

Section: Simple Model For Fractional‐n Cp‐pllmentioning

confidence: 99%

“…Using Newton iterated method can implement a numerical solving procedure. 5 According to this algorithm, a function named tdiv_comp() can compute the next rising edge of divider output t n+1 from t n .…”

Section: Multi-modulus Divider and Waveform Generatormentioning

confidence: 99%

“…Among all different kinds of behavioral simulation methods, the event-driven (ED) model is powerful and efficient to analyze nonlinear behaviors of the mixed-signal PLLs. [4][5][6][7] In the ED model, we can model the PFD by defining three states, S 0 , S 1 , S 2 of the PFD, in which, the events include the rising (falling) edges of the reference clock and the divider output. The switch between different states occurs during the rising (falling) edges approaching, where we can define the time that the occurrence of the rising (falling) edges for the reference clock and the divider output are t r and t d respectively.…”

Section: Introductionmentioning

confidence: 99%

“…Among all different kinds of behavioral simulation methods, the event‐driven (ED) model is powerful and efficient to analyze nonlinear behaviors of the mixed‐signal PLLs 4–7 . In the ED model, we can model the PFD by defining three states, S 0 , S 1 , S 2 of the PFD, in which, the events include the rising (falling) edges of the reference clock and the divider output.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

An event‐driven model of fractional‐N CPPLL based FMCW synthesizers

Li,

Mawuli,

Xing

et al. 2023

Int J Numerical Modelling

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This paper proposes an improved event‐driven (ED) model to improve the simulation efficiency of a mixed‐signal charge‐pump phase locked loop (CP‐PLL) design for a frequency‐modulated continuous‐wave (FMCW) chirp generation. The improvement mainly comes into three parts. First, we update the data only when it changes during the previous trigger. Second, we save the data at the triggering moment of the reference clock to achieve uniform sampling for better noise characterization. Furthermore, we propose a simplified model that is specifically optimized for the third‐order loop filter (LF). This article presents a detailed design flow of the improved ED model, and we apply it to the simulation of the FMCW chirp generation. Compared to the conventional transistor‐level simulation, our proposed model reduces the simulation time to less than 1 s, which leads to a reduction of the simulation time by five or six orders of magnitude.

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Section: Lf Modelmentioning

confidence: 99%

Section: Simple Model For Fractional‐n Cp‐pllmentioning

confidence: 99%

Section: Multi-modulus Divider and Waveform Generatormentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

An event‐driven model of fractional‐N CPPLL based FMCW synthesizers

Li,

Mawuli,

Xing

et al. 2023

Int J Numerical Modelling

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Phase Locked Loops

Kolumbán

2005

Encyclopedia of RF and Microwave Engineering

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Phase‐locked loops (PLLs) are frequently used in RF and microwave telecommunication systems and measurement equipment to implement various circuits from carrier recovery to frequency synthesis. The goal of this article is to survey the theory and the most important applications of phase‐locked loops. The main emphasis was placed on the analog PLL theory and frequency synthesis. The former is relatively easy to understand and is the basis of every other PLL analysis. The latter is crucial in RF and microwave engineering since frequency synthesizers are used almost everywhere to generate the signals required in the different applications. The PLL article is organized as follows. Section 1 is devoted to the analog PLL theory. First the baseband model is developed and the linear theory of analog PLL (tracking, modulation, and noise) is discussed. Finally, the most important nonlinear effects (acquisition, cycle slips, hangup) are surveyed. Section 2 discusses the most common PLL applications. Section 3 is devoted to frequency synthesis, where both the sampling (sample‐and‐hold‐type phase detector) and charge‐pump (phase–frequency detector with charge‐pump) PLLs are considered. These phase detectors are edge‐triggered circuits; the discrete‐time operation makes the analysis of these PLLs very complex. The problem of discrete‐time operation arising from the application of edge‐triggered circuits is discussed and design methods are given.

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Nonlinear behavioural model of charge pump PLLs

Brambilla

Linaro

Storace

2012

Circuit Theory & Apps

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Despite the nonlinear nature of even the simplest versions of phase locked loops (PLLs), linear models are still used during the first phases of the design of modern PLLs. Even though the linear model may represent a crude approach, its use is justified by the fact that accurate numerical simulations often require a too large amount of CPU time, being PLLs by construction stiff circuits, characterised by very different time scales. This aspect has triggered the need for compact models that allow fast and accurate numerical simulations. The scientific literature numbers several models that have been developed with different approaches and tailored to different simulation environments. In this context, we propose a nonlinear model of a type-II PLL, which (1) considers both the switching behaviour of the phase/frequency detector and charge pump and the complex dynamics (including the presence of amplitude and phase noise) of the voltage controlled oscillator, (2) is compact and can be easily implemented in modern mixed analog/digital simulators as a behavioural block, and (3) allows the simulation of spurs owing to the nonlinearities of both the charge pump and the fractional frequency divider

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Untitled

Cited by 33 publications

References 5 publications

An event‐driven model of fractional‐N CPPLL based FMCW synthesizers

An event‐driven model of fractional‐N CPPLL based FMCW synthesizers

Phase Locked Loops

Nonlinear behavioural model of charge pump PLLs

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