9.8 An energy-efficient 3.7nV/√Hz bridge-readout IC with a stable bridge offset compensation scheme

Abstract

This paper describes an energy-efficient bridge readout IC (ROIC), which consists of a capacitively coupled instrumentation amplifier (CCIA) that drives a continuous-time delta-sigma modulator (CTM). By exploiting the CCIA's ability to block dc common-mode voltages, the bridge's bias voltage may exceed the ROIC's supply voltage, allowing these voltages to be independently optimized. Since bridge output is typically much smaller than bridge offset, a digital to analog converter (DAC) is used to compensate this offset before amplification and thus increase the CCIA's useful dynamic range. Bridge loading is reduced by using a dual-path positive feedback scheme to boost the CCIA's input impedance. Furthermore, the CCIA's output is gated to avoid digitizing its output spikes, which would otherwise limit the ROIC's linearity and stability. The ROIC achieves an input-referred noise density of 3.7 nV/ √ Hz, a noise efficiency factor (NEF) of 5, and a power efficiency factor (PEF) of 44, which both represent the state of the art. A pressure sensing system, built with the ROIC and a differential pressure sensor (AC4010), achieves 10.1-mPa (1σ ) resolution in a 0.5-ms conversion time. The ROIC dissipates about 30% of the system's power dissipation and contributes about 6% of its noise power. To reduce the sensor's offset drift, a temperature compensation scheme based on an external reference resistor is used. After a two-point calibration, this scheme reduces bridge offset drift by 80× over a 50°C range.

An Energy-Efficient 3.7-nV/<inline-formula> <tex-math notation="LaTeX">$\surd$ </tex-math> </inline-formula>Hz Bridge Readout IC With a Stable Bridge Offset Compensation Scheme

“…5(b)] at the expense of increased design complexity [6]. In this design, the CCIA's residual spikes are avoided by gating the input of a CTM [4]. As shown in Fig.…”

“…Since they only require one noise-critical input stage, CCIAs are generally more energy efficient than three-Opamp and current-feedback (CF) IAs [15]. Moreover, their input capacitors naturally block common-mode (CM) input voltages, allowing them to handle CM levels much larger than their supply voltages [4]. In bridge readout applications, this means that the bridge and the ROIC can be powered from different voltage supplies, allowing the ROIC's supply voltage to be optimized for energy efficiency.…”

A 4.5 nV/√Hz Capacitively Coupled Continuous-Time Sigma-Delta Modulator with an Energy-Efficient Chopping Scheme

“…Consequently, they are often used for the high resolution readout of Wheatstone bridge sensors, e.g. μK-resolution temperature sensors [1], and mPa-resolution differential pressure sensors [2]. Since the output of such sensors is often at the mV-level, such modulators also require low offset, 1/f noise and drift [1,2].…”

“…To avoid quantization noise fold-back in a chopped CTΣΔM, several approaches have been proposed. The first is to chop the CTΣΔM at its sampling frequency fs [2]. This is simple and effective, but often means that the chopping frequency fchop will be higher than necessary, i.e.…”

A Power-Efficient Readout for Wheatstone-Bridge Sensors With COTS Components

“…Furthermore, applying this architecture with COTS components is difficult as a very good match is required between the G1 and G2 stages to avoid thermal drift. Lastly, the energy efficiency of the readout In comparison, capacitively coupled IAs (CCIAs) provide even better energy efficiency because they only have a single main Opamp which dominates the noise and power dissipation of the readout circuit of the bridge sensors [12]. However, an energy-efficient CCIA is also difficult to realize using COTS components on a PCB board, since the noise performance will be degraded by the PCB board parasitic [13].…”